公开(公告)号：US20230232612A1

公开(公告)日：2023-07-20

申请号：US18050179

申请日：2022-10-27

Applicant: Samsung Electronics Co., Ltd.

Inventor： Chanwoo Shin ,  Hyuckjin KANG ,  Donghwan LEE ,  Jeonil LEE ,  Minwu KIM ,  Jungwoo SONG

IPC: H01L29/94

CPC classification number: H01L27/10814 ,  H01L27/10885 ,  H01L27/10855

Abstract: A semiconductor device includes a bit line structure on a substrate, a lower contact plug on a portion of the substrate adjacent to the bit line structure, an upper contact plug including a first metal pattern on the lower contact plug and a second metal pattern contacting an upper surface and an upper sidewall of the first metal pattern, and a capacitor on the upper contact plug. The upper surface of the first metal pattern is above an upper surface of the bit line structure with respect to an upper surface of the substrate.