公开(公告)号：US20220123014A1

公开(公告)日：2022-04-21

申请号：US17338823

申请日：2021-06-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kangmin KIM ,  Seungmin SONG ,  Dongseog EUN ,  Seokhwa JUNG

IPC: H01L27/11582 ,  H01L27/11556 ,  H01L27/11529 ,  H01L27/11573

Abstract: A semiconductor chip includes a substrate, a source structure disposed on the substrate, and a support pattern disposed on the source structure. Each of the source structure and the support pattern includes polysilicon. The semiconductor chip further includes an electrode structure disposed on the support pattern, and a plurality of vertical structures extending vertically through the electrode structure. The electrode structure includes a lower electrode structure disposed on the support pattern and including a plurality of lower gate electrodes and a plurality of first insulating films, a second insulating film disposed on the lower electrode structure, and an upper electrode structure disposed on the second insulating film and including a plurality of upper gate electrodes and a plurality of third insulating films. The vertical structures contact the source structure above the source structure.

公开(公告)号：US20220123001A1

公开(公告)日：2022-04-21

申请号：US17348172

申请日：2021-06-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kangmin KIM ,  Jaehoon SHIN ,  Dongseog EUN ,  Geunwon LIM

IPC: H01L27/11526 ,  H01L27/11582 ,  H01L27/11519 ,  H01L27/11524 ,  H01L27/11556 ,  H01L27/11565 ,  H01L27/1157 ,  H01L27/11573

Abstract: A semiconductor device includes a first substrate; devices on the first substrate; a second substrate on the devices; gate electrodes stacked on the second substrate and spaced apart from each other in a first direction; channel structures penetrating the gate electrodes, extending in the first direction, and including a channel layer; isolation regions penetrating the gate electrodes and extending in a second direction; a through contact plug penetrating the second substrate, extending in the first direction, and electrically connecting the gate electrodes to the devices; a barrier structure spaced apart from the through contact plug and surrounding the through contact plug; and a support structure on the gate electrodes and including support patterns, wherein the support structure has first through regions spaced apart from each other in the second direction on the isolation regions and a second through region in contact with an upper surface of the barrier structure.

公开(公告)号：US20210375905A1

公开(公告)日：2021-12-02

申请号：US17140277

申请日：2021-01-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Changsun HWANG ,  Youngjin KWON ,  Gihwan KIM ,  Hansol SEOK ,  Dongseog EUN ,  Jongheun LIM

IPC: H01L27/11573 ,  H01L23/522 ,  H01L27/11556 ,  H01L27/11529 ,  H01L27/11582

Abstract: An integrated circuit device includes: a substrate having a cell region, a peripheral circuit region, and an interconnection region between the cell region and the peripheral circuit region; a first cell stack structure and a second cell stack structure on the first cell stack structure, each including a plurality of insulating layers and a plurality of word line structures alternately stacked on the substrate; and a dummy stack structure located at a same vertical level as the second cell stack structure, and including a plurality of dummy insulating layers and a plurality of dummy support layers alternately stacked in the peripheral circuit region.