公开(公告)号：US20250014619A1

公开(公告)日：2025-01-09

申请号：US18670910

申请日：2024-05-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Gyuseong Kang ,  EUNJI LEE

IPC: G11C11/16

Abstract: A memory device includes a memory cell having an access transistor and a variable resistance element, a word line connected to a gate of the access transistor, and a gate driver circuit configured to provide a word line voltage to the word line in a read operation or a write operation, receive, during the read operation, a first power supply voltage from a power terminal and provide a second power supply voltage lower than the first power supply voltage to the word line by attenuating the first power supply voltage to the second power supply voltage, and receive, during the write operation, a third power supply voltage higher than the first power supply voltage from the power terminal and provide the third power supply voltage to the word line without attenuating the third power supply voltage.