DECOUPLING L2 BTB FROM L2 CACHE TO ACCELERATE SEARCH FOR MISS AFTER MISS
    1.
    发明申请
    DECOUPLING L2 BTB FROM L2 CACHE TO ACCELERATE SEARCH FOR MISS AFTER MISS 审中-公开
    从L2缓存中解码L2 BTB,以便在MISS之后加速MISS的搜索

    公开(公告)号:US20150268961A1

    公开(公告)日:2015-09-24

    申请号:US14463638

    申请日:2014-08-19

    Abstract: According to one general aspect, a method may include requesting, from a second tier of a cache memory system, a first instruction stored at a first memory address. The method may also include requesting, from a second tier of a branch target buffer system, a branch record associated with the first memory address. The method may also include receiving the branch record before receiving the first instruction. The method may also include pre-fetching, in response to receiving the branch record and before receiving the first instruction, a non-sequential instruction stored at a non-sequential memory address.

    Abstract translation: 根据一个一般方面,一种方法可以包括从高速缓冲存储器系统的第二层请求存储在第一存储器地址处的第一指令。 该方法还可以包括从分支目标缓冲器系统的第二层请求与第一存储器地址相关联的分支记录。 该方法还可以包括在接收第一指令之前接收分支记录。 该方法还可以包括:响应于接收到分支记录并在接收到第一指令之前预取存储在非顺序存储器地址处的非顺序指令。

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