公开(公告)号：US20180286861A1

公开(公告)日：2018-10-04

申请号：US15793442

申请日：2017-10-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： KYUNGIN CHOI ,  Taehyeon KIM ,  HONGSHIK SHIN ,  TAEGON KIM ,  JAEYOUNG PARK ,  YUICHIRO SASAKI

IPC: H01L27/092 ,  H01L21/768 ,  H01L21/225

CPC classification number: H01L27/0922 ,  H01L21/2253 ,  H01L21/76841 ,  H01L21/823814 ,  H01L27/092 ,  H01L29/161 ,  H01L29/165 ,  H01L29/665 ,  H01L29/66545 ,  H01L29/7848 ,  H01L29/785

Abstract: A method of fabricating a semiconductor device includes pattering an upper portion of a substrate to form a first active pattern, the substrate including a semiconductor element having a first lattice constant, performing a selective epitaxial growth process on an upper portion of the first active pattern to form a first source/drain region, doping the first source/drain region with gallium, performing an annealing process on the first source/drain region doped with gallium, and forming a first contact pattern coupled to the first source/drain region. The first source/drain region includes a semiconductor element having a second lattice constant larger than the first lattice constant.

公开(公告)号：US20210013204A1

公开(公告)日：2021-01-14

申请号：US17015307

申请日：2020-09-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： KYUNGIN CHOI ,  Taehyeon KIM ,  HONGSHIK SHIN ,  TAEGON KIM ,  JAEYOUNG PARK ,  YUICHIRO SASAKI

IPC: H01L27/092 ,  H01L21/225 ,  H01L21/768 ,  H01L21/8238 ,  H01L29/66 ,  H01L29/78 ,  H01L29/417

Abstract: A method of fabricating a semiconductor device includes pattering an upper portion of a substrate to form a first active pattern, the substrate including a semiconductor element having a first lattice constant, performing a selective epitaxial growth process on an upper portion of the first active pattern to form a first source/drain region, doping the first source/drain region with gallium, performing an annealing process on the first source/drain region doped with gallium, and forming a first contact pattern coupled to the first source/drain region. The first source/drain region includes a semiconductor element having a second lattice constant larger than the first lattice constant.

公开(公告)号：US20190287969A1

公开(公告)日：2019-09-19

申请号：US16419318

申请日：2019-05-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： KYUNGIN CHOI ,  Taehyeon KIM ,  HONGSHIK SHIN ,  TAEGON KIM ,  JAEYOUNG PARK ,  YUICHIRO SASAKI

IPC: H01L27/092 ,  H01L21/225 ,  H01L21/768 ,  H01L29/78 ,  H01L29/66 ,  H01L21/8238

Abstract: A method of fabricating a semiconductor device includes pattering an upper portion of a substrate to form a first active pattern, the substrate including a semiconductor element having a first lattice constant, performing a selective epitaxial growth process on an upper portion of the first active pattern to form a first source/drain region, doping the first source/drain region with gallium, performing an annealing process on the first source/drain region doped with gallium, and forming a first contact pattern coupled to the first source/drain region. The first source/drain region includes a semiconductor element having a second lattice constant larger than the first lattice constant.