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    IMAGE PROCESSING DEVICE FOR COMPUTING AN INITIAL PHASE HAVING MAGNITUDE AND DIRECTION BASED ON IMAGE PROCESSING INFORMATION
    1.
    发明申请
    IMAGE PROCESSING DEVICE FOR COMPUTING AN INITIAL PHASE HAVING MAGNITUDE AND DIRECTION BASED ON IMAGE PROCESSING INFORMATION 有权
    用于基于图像处理信息计算具有磁场和方向的初始相位的图像处理装置

    公开(公告)号：US20160260221A1

    公开(公告)日：2016-09-08

    申请号：US15057784

    申请日：2016-03-01

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： SEONG WOON KIM ,  Sung Chul Yoon ,  Ha Na Yang

    IPC: G06T7/00 ,  G06K9/46 ,  H04N19/70 ,  G06K9/62 ,  G06K9/52 ,  G06T3/60 ,  G06T3/40 ,  G06T7/40 ,  G06T7/60

    CPC classification number: G06K9/6215 ,  G06T3/40 ,  G06T3/60

    Abstract: A image processing method includes computing an initial phase corresponding to a difference between a position of a first pixel of an input image and a position of a first pixel of an output image using at least one of scaling ratio information between the input and output images, chroma subsampling format conversion information applied between the input and output images, or rotation angle information of the input image, and determining the position of the first pixel of the output image based on the initial phase and the position of the first pixel of the input image.

    Abstract translation: 图像处理方法包括使用输入和输出图像之间的缩放比率信息中的至少一个来计算与输入图像的第一像素的位置和输出图像的第一像素的位置之间的差相对应的初始相位， 施加在输入图像和输出图像之间的色度子采样格式转换信息或输入图像的旋转角度信息，以及基于输入图像的初始相位和第一像素的位置来确定输出图像的第一像素的位置 。

    Image processor, method, and chipset for increasing intergration and performance of image processing
    5.
    发明授权
    Image processor, method, and chipset for increasing intergration and performance of image processing 有权

    公开(公告)号：US10152766B2

    公开(公告)日：2018-12-11

    申请号：US14959724

    申请日：2015-12-04

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Seong Woon Kim ,  Sung Chul Yoon ,  Sang Hoon Lee ,  Ha Na Yang

    IPC: G06T1/60 ,  G06T1/20 ,  G06T3/40 ,  G06F3/06 ,  G09G5/393 ,  G09G5/399

    Abstract: An image processor, an application processor, a method of operating an image processor, and a chips set of an image processor are provided. The image processor includes a scaler configured to perform scaling on an input image and generate a scaled input image; and a selection circuit configured to transmit the scaled input image to either a low latency memory or a high density memory according to a memory selection signal. The application processor includes a memory configured to store an input image; and an image processor configured to scale the input image, wherein the image processor comprises a scaler configured to perform scaling on the input image and generate a scaled input image and a selection circuit configured to transmit the scaled input image to either a low latency memory or a high density memory according to a memory selection signal.

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