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    Semiconductor device
    2.
    发明授权
    Semiconductor device 有权

    公开(公告)号：US11322119B2

    公开(公告)日：2022-05-03

    申请号：US16791856

    申请日：2020-02-14

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Sung Chul Yoon ,  Seong Woon Kim ,  Hyeong-Seok Kim ,  Kil Whan Lee

    IPC: G09G5/36 ,  G09G5/395 ,  G09G5/393 ,  G06T1/20

    Abstract: A semiconductor device includes a processor configured to perform a rendering operation of an image frame to acquire rendering data, and write the acquired rendering data on a memory device, and a display controller configured to perform a read operation of the memory device on which the rendering data is written, to acquire image data. The semiconductor device further includes a micro-sequencing circuit configured to transmit a start signal to the display controller, based on a degree of execution of the rendering operation. The display controller is further configured to, based on the transmitted start signal, start the read operation.

    IMAGE CAPTURE APPARATUS AND IMAGE CAPTURE METHOD
    3.
    发明申请
    IMAGE CAPTURE APPARATUS AND IMAGE CAPTURE METHOD 审中-公开
    图像捕获设备和图像捕获方法

    公开(公告)号：US20140043517A1

    公开(公告)日：2014-02-13

    申请号：US13963790

    申请日：2013-08-09

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Hyun Ock Yim ,  Jin Pyo Gwak ,  Seong Woon Kim ,  Ung Sik Kim

    IPC: H04N5/232

    CPC classification number: H04N5/23293 ,  H04N1/00411 ,  H04N1/00413 ,  H04N1/2112 ,  H04N5/23216 ,  H04N5/23222 ,  H04N5/23245 ,  H04N2101/00 ,  H04N2201/0084

    Abstract: An image capture apparatus automatically sets an image capture mode based on a subject or surrounding, and a user changes set values of image processing options of the set image capture mode as needed, thereby providing convenience and flexibility. The image capture apparatus includes a scene mode selection unit that analyzes a live view image according to a predetermined scene selection algorithm and selects a scene mode based on the analysis result, a display unit that displays a user interface to select an image processing option related to the selected scene mode and to change a set value of the selected image processing option, and a controller that receives the changed set value of the selected image processing option before an image is captured in the selected scene mode, applies the changed set value to the selected scene mode, and captures the live view image in the selected scene mode.

    Abstract translation: 图像捕获装置基于被摄体或周围自动设定图像拍摄模式，并且用户根据需要改变所设置的图像拍摄模式的图像处理选项的设定值，从而提供方便和灵活性。 图像拍摄装置包括：场景模式选择单元，其根据预定场景选择算法分析实时取景图像，并且基于分析结果选择场景模式;显示单元，显示用户界面以选择与 所选择的场景模式并且改变所选择的图像处理选项的设定值，以及在所选择的场景模式中拍摄图像之前接收所选择的图像处理选项的改变的设定值的控制器，将改变的设定值应用于 选择的场景模式，并在所选场景模式下捕获实时取景图像。

    Integrated circuit for computing target entry address of buffer descriptor based on data block offset, method of operating same, and system including same
    4.
    发明授权
    Integrated circuit for computing target entry address of buffer descriptor based on data block offset, method of operating same, and system including same 有权
    用于基于数据块偏移计算缓冲器描述符的目标入口地址的集成电路，其操作方法和包括其的系统

    公开(公告)号：US09298613B2

    公开(公告)日：2016-03-29

    申请号：US14144682

    申请日：2013-12-31

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Seong Woon Kim ,  Kwan Ho Kim ,  Seok Min Kim ,  Tae Sun Kim

    IPC: G06F13/12 ,  G06F13/38 ,  G06F12/06 ,  G06F12/02

    CPC classification number: G06F12/06 ,  G06F12/0292

    Abstract: A method of operating an integrated circuit is provided. The method includes receiving a data block offset from a second storage device, obtaining a target entry address using the data block offset, and reading an entry among a plurality of entries comprised in a buffer descriptor stored in a first storage device based on the target entry address. The method also includes reading data from a data buffer among a plurality of data buffers included in the first storage device using a physical address included in the entry and transmitting the data to the second storage device.

    Abstract translation: 提供一种操作集成电路的方法。 该方法包括从第二存储设备接收数据块偏移量，使用数据块偏移获取目标条目地址，以及基于目标条目读取包含在存储在第一存储设备中的缓冲器描述符中的多个条目中的条目 地址。 该方法还包括使用包含在条目中的物理地址从包括在第一存储装置中的多个数据缓冲器中的数据缓冲器读取数据，并将数据发送到第二存储装置。

    Display controller and display device including the same
    5.
    发明授权
    Display controller and display device including the same 有权

    公开(公告)号：US12148353B2

    公开(公告)日：2024-11-19

    申请号：US17867033

    申请日：2022-07-18

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Seong Woon Kim ,  Kil Whan Lee ,  Sun-Ae Kim ,  Sang Hoon Lee ,  Yong Kwon Cho ,  Sang Hoon Ha

    IPC: G09G3/20

    Abstract: A display controller includes a resource controller configured to receive layer information about each of a first layer and a second layer that are output at different times through a display panel during a unit frame. The display controller includes a data input direct memory access (DMA) configured to receive first image data corresponding to the first layer and second image data corresponding to the second layer, and a hardware resource configured to receive the first and second image data from the data input DMA, process the received first and second image data according to the layer information, and generate first layer data of the first layer and second layer data of the second layer. The resource controller is configured to control the data input DMA according to the layer information to determine an order in which the first and second image data are provided to the hardware resource.

    Image processor, method, and chipset for increasing intergration and performance of image processing
    6.
    发明授权
    Image processor, method, and chipset for increasing intergration and performance of image processing 有权

    公开(公告)号：US10152766B2

    公开(公告)日：2018-12-11

    申请号：US14959724

    申请日：2015-12-04

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Seong Woon Kim ,  Sung Chul Yoon ,  Sang Hoon Lee ,  Ha Na Yang

    IPC: G06T1/60 ,  G06T1/20 ,  G06T3/40 ,  G06F3/06 ,  G09G5/393 ,  G09G5/399

    Abstract: An image processor, an application processor, a method of operating an image processor, and a chips set of an image processor are provided. The image processor includes a scaler configured to perform scaling on an input image and generate a scaled input image; and a selection circuit configured to transmit the scaled input image to either a low latency memory or a high density memory according to a memory selection signal. The application processor includes a memory configured to store an input image; and an image processor configured to scale the input image, wherein the image processor comprises a scaler configured to perform scaling on the input image and generate a scaled input image and a selection circuit configured to transmit the scaled input image to either a low latency memory or a high density memory according to a memory selection signal.

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