公开(公告)号：US20240334673A1

公开(公告)日：2024-10-03

申请号：US18518687

申请日：2023-11-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ki Seok LEE ,  Hong Jun LEE ,  Hyun Geun CHOI ,  Keun Nam KIM ,  In Cheol NAM ,  Bo Won YOO ,  Jin Woo HAN

IPC: H10B12/00

CPC classification number: H10B12/038 ,  H10B12/482 ,  H10B12/488

Abstract: A semiconductor device includes a lower substrate, a memory cell structure including a wordline on the lower substrate, a bitline disposed on the lower substrate and intersecting the wordline, and a cell capacitor connected to the lower substrate, an upper substrate having a back side adjacent to the lower substrate and a front side opposite to the back side, a circuit element disposed on the front side of the upper substrate and overlapping the memory cell structure in a vertical direction, and a through via penetrating the upper substrate and electrically connecting the memory cell structure and the circuit element with each other.