公开(公告)号：US20220392513A1

公开(公告)日：2022-12-08

申请号：US17565743

申请日：2021-12-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kyu Won CHOI ,  Tae Min CHOI ,  Hyeong Cheol KIM ,  Chan Ho LEE

IPC: G11C11/4076 ,  G11C11/4074 ,  G11C11/408 ,  G11C11/4094 ,  H03K19/017

Abstract: A memory device and operating method of the memory device are provided. The memory device comprises a memory cell storing data based on a first voltage, a row decoder selecting a wordline of the memory cell based on the first voltage, and a wordline predecoder configured to generate a “predec” signal, which is for generating a wordline voltage to be provided to the row decoder. The wordline predecoder is driven by the first voltage and a second voltage, which is different from the first voltage, receives a row address signal, associated with selecting the wordline, and an internal clock signal associated with adjusting operating timings of elements included in the memory device. The wordline predecoder performs a NAND operation on the row address signal and the internal clock signal, and provides the “predec” signal generated based on a result of the NAND operation to the row decoder.