公开(公告)号：US20230042905A1

公开(公告)日：2023-02-09

申请号：US17704465

申请日：2022-03-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yongchul JEONG ,  Sangjin KIM ,  Yigwon KIM ,  Kyeongbeom PARK ,  Suhyun BARK ,  Sangshin JANG ,  Jinhee JANG ,  Cheolin JANG ,  Tae Min CHOI

IPC: H01L21/768 ,  H01L21/027 ,  H01L21/311

Abstract: A method of fabricating a semiconductor device is disclosed. The method may include forming an etch-target layer, a mask layer, a blocking layer, and a photoresist layer, which are sequentially stacked on a substrate; forming a photoresist pattern, the forming the photoresist pattern including irradiating the photoresist layer with extreme ultraviolet (EUV) light; forming a mask layer, the forming the mask layer including etching the mask layer using the photoresist pattern as an etch mask; and forming a target pattern, the forming the target pattern including etching the etch-target layer using the mask pattern as an etch mask. The photoresist layer may include an organic metal oxide. The blocking layer may be a non-polar layer and may limit and/or prevent a metallic element in the photoresist layer from infiltrating into the mask layer.

公开(公告)号：US20220392513A1

公开(公告)日：2022-12-08

申请号：US17565743

申请日：2021-12-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kyu Won CHOI ,  Tae Min CHOI ,  Hyeong Cheol KIM ,  Chan Ho LEE

IPC: G11C11/4076 ,  G11C11/4074 ,  G11C11/408 ,  G11C11/4094 ,  H03K19/017

Abstract: A memory device and operating method of the memory device are provided. The memory device comprises a memory cell storing data based on a first voltage, a row decoder selecting a wordline of the memory cell based on the first voltage, and a wordline predecoder configured to generate a “predec” signal, which is for generating a wordline voltage to be provided to the row decoder. The wordline predecoder is driven by the first voltage and a second voltage, which is different from the first voltage, receives a row address signal, associated with selecting the wordline, and an internal clock signal associated with adjusting operating timings of elements included in the memory device. The wordline predecoder performs a NAND operation on the row address signal and the internal clock signal, and provides the “predec” signal generated based on a result of the NAND operation to the row decoder.

公开(公告)号：US20230375936A1

公开(公告)日：2023-11-23

申请号：US18153568

申请日：2023-01-12

Applicant: Samsung Electronics Co, Ltd.

Inventor： Sangjin KIM ,  Chansik KIM ,  Geun Su LEE ,  Sungjae JUNG ,  Dokyeong KWON ,  Yigwon KIM ,  Hyunju SONG ,  Hyungju RYU ,  Tae Min CHOI ,  Keon HUH

IPC: G03F7/32 ,  C08F297/02

CPC classification number: G03F7/322 ,  C08F297/02

Abstract: A developing composition and a method of forming a pattern using the same are provided. According to embodiments of inventive concepts, the developing composition may include at least one repeating unit selected from a first repeating unit represented by Chemical Formula A1 a second repeating unit represented by Chemical Formula A2, or both the first repeating unit represented by Chemical Formula A1 and second repeating unit represented by Chemical Formula A2. The developing composition may further include a copolymer including a third repeating unit represented by Chemical Formula A3.