公开(公告)号：US20220139881A1

公开(公告)日：2022-05-05

申请号：US17574953

申请日：2022-01-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyeonjun SONG ,  Eunkyul OH ,  Hyeongmun KANG ,  Jungmin KO

IPC: H01L25/065 ,  H01L21/56 ,  H01L23/367 ,  H01L23/31 ,  H01L21/48 ,  H01L25/00 ,  H01L23/00

Abstract: A semiconductor package may include a package substrate, semiconductor chips, signal bumps, and first and second heat dissipation bumps. The semiconductor chips may be stacked on an upper surface of the package substrate, have first and second regions having different heat dissipation efficiencies. The second temperature may be higher than the first temperature. The signal bumps may be arranged between the semiconductor chips. The first heat dissipation bumps may be arranged between the semiconductor chips in the first region by a first pitch. The second heat dissipation bumps may be arranged between the semiconductor chips in the second region by a second pitch narrower than the first pitch. Heat generated from the second region of the semiconductor chips may be dissipated through the second heat dissipation bumps, which may be relatively closely arranged with each other.

公开(公告)号：US20230005835A1

公开(公告)日：2023-01-05

申请号：US17851129

申请日：2022-06-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyeonjun SONG ,  Taehyeong KIM ,  Sangyoung KIM

IPC: H01L23/498 ,  H01L25/065 ,  H01L23/31 ,  H01L23/29 ,  H01L23/00

Abstract: A semiconductor package includes a base chip including a passivation layer on an upper surface thereof, a semiconductor chip on the base chip, a bump on a lower surface of the semiconductor chip, an underfill layer covering the bump and covering the lower surface of the semiconductor chip, an encapsulant covering the semiconductor chip on the base chip, and an organic material layer on the passivation layer, wherein the base chip includes silicon (Si), the passivation layer has a first region in contact with the underfill layer and a second region, surrounding the first region, and the organic material layer is on the second region.

公开(公告)号：US20230029098A1

公开(公告)日：2023-01-26

申请号：US17730550

申请日：2022-04-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Taehyeong KIM ,  Hyeonjun SONG ,  Jungseok AHN

IPC: H01L25/065 ,  H01L23/00 ,  H01L23/48

Abstract: A semiconductor package including a first substrate including a first bump pad and a filling compensation film (FCF) around the first bump pad; a second substrate facing the first substrate and including a second bump pad; a bump structure (BS) in contact with the first bump pad and the second bump pad; and a non-conductive film (NCF) surrounding the BS and between the first substrate and the second substrate, wherein the NCF covers an upper surface and an edge of the FCF.

公开(公告)号：US20210265315A1

公开(公告)日：2021-08-26

申请号：US17030588

申请日：2020-09-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyeonjun SONG ,  Eunkyul OH ,  Hyeongmun KANG ,  Jungmin KO

IPC: H01L25/065 ,  H01L23/00 ,  H01L23/31 ,  H01L23/367 ,  H01L21/48 ,  H01L21/56 ,  H01L25/00

Abstract: A semiconductor package may include a package substrate, semiconductor chips, signal bumps, and first and second heat dissipation bumps. The semiconductor chips may be stacked on an upper surface of the package substrate, have first and second regions having different heat dissipation efficiencies. The second temperature may be higher than the first temperature. The signal bumps may be arranged between the semiconductor chips. The first heat dissipation bumps may be arranged between the semiconductor chips in the first region by a first pitch. The second heat dissipation bumps may be arranged between the semiconductor chips in the second region by a second pitch narrower than the first pitch. Heat generated from the second region of the semiconductor chips may be dissipated through the second heat dissipation bumps, which may be relatively closely arranged with each other.