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公开(公告)号：US20210241467A1
公开(公告)日：2021-08-05
申请号：US17144488
申请日：2021-01-08
Applicant: Samsung Electronics Co., Ltd.
Inventor： Jaeha LEE , Taehyeong KIM , Hyunjung NAM , Jaebum PARK , Joonah PARK
Abstract: An electronic apparatus is provided. The electronic apparatus includes a camera, a Light Detection And Ranging (LiDAR) sensor, and a processor configured to track an object based on a plurality of images photographed by the camera sequentially, wherein, to track the object based on the plurality of images, the processor is configured to, based on the object being identified in a first image from among a plurality of images and subsequently, not being identified in a second image after the first image, control a photographing direction of the camera based on scanning information obtained by the LiDAR sensor.
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2.发明公开公开(公告)号：US20240094803A1
公开(公告)日：2024-03-21
申请号：US18226053
申请日：2023-07-25
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Miyoung KIM , Taehyeong KIM , Hyelim PARK
CPC classification number: G06F3/011 , G06F3/017 , G06F3/167 , G06T7/50 , G06T7/70 , G06T2200/24 , G06T2207/20084 , G06T2207/30196 , H04N23/62
Abstract: An electronic apparatus includes a camera, a driver, a display, and at least one processor operatively connected to the camera, the driver, and the display. The processor is configured to control the camera to capture an image, identify a user posture included in the captured image, identify at least one parameter among a plurality of parameters related to a user based on the user posture, and control the driver to change a position of the electronic apparatus based on the at least one parameter, and change a posture of the display.
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公开(公告)号：US20220254643A1
公开(公告)日：2022-08-11
申请号：US17547626
申请日：2021-12-10
Inventor： Kyung-Eun BYUN , Sangwoo KIM , Minsu SEOL , Hyeonjin SHIN , Minseok SHIN , Pin ZHAO , Taehyeong KIM , Jaehwan JUNG
IPC: H01L21/308 , H01J37/34
Abstract: A method of forming a material film includes providing a non-photosensitive mask on a substrate to expose a partial region of the substrate, forming a material film on the partial region of the substrate using a sputtering process, removing the non-photosensitive mask, and heat-treating the substrate and the material film from which the non-photosensitive mask is removed under a first gas atmosphere. The material film includes a transition metal and a chalcogen element. The sputtering process may include an RF magnetron sputtering process. The heat treatment may be performed at a higher temperature than a temperature of the forming the material film.
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公开(公告)号：US20230029098A1
公开(公告)日：2023-01-26
申请号：US17730550
申请日：2022-04-27
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Taehyeong KIM , Hyeonjun SONG , Jungseok AHN
IPC: H01L25/065 , H01L23/00 , H01L23/48
Abstract: A semiconductor package including a first substrate including a first bump pad and a filling compensation film (FCF) around the first bump pad; a second substrate facing the first substrate and including a second bump pad; a bump structure (BS) in contact with the first bump pad and the second bump pad; and a non-conductive film (NCF) surrounding the BS and between the first substrate and the second substrate, wherein the NCF covers an upper surface and an edge of the FCF.
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公开(公告)号：US20220148994A1
公开(公告)日：2022-05-12
申请号：US17584776
申请日：2022-01-26
Applicant: Samsung Electronics Co., Ltd.
Inventor： Taehyeong KIM , Hyeongmun KANG , Seungduk BAEK
IPC: H01L23/00 , H01L25/065 , H01L25/10
Abstract: Disclosed is a semiconductor package comprising a first semiconductor chip and at least one second semiconductor chip on the first semiconductor chip. The second semiconductor chip includes first and second test bumps that are adjacent to an edge of the second semiconductor chip and are on a bottom surface of the second semiconductor chip. The first and second test bumps are adjacent to each other. The second semiconductor chip also includes a plurality of data bumps that are adjacent to a center of the second semiconductor chip and are on the bottom surface of the second semiconductor chip. A first interval between the second test bump and one of the data bumps is greater than a second interval between the first test bump and the second test bump. The one of the data bumps is most adjacent to the second test bump.
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Patent Agency Ranking
6.发明公开公开(公告)号：US20240112627A1
公开(公告)日：2024-04-04
申请号：US18532150
申请日：2023-12-07
Applicant: Samsung Electronics Co., Ltd.
Inventor： Hanyuool KIM , Seungkyu CHOI , Taehyeong KIM , Taewoong LEE
IPC: G09G3/3208 , G06T7/11 , G06T11/00
CPC classification number: G09G3/3208 , G06T7/11 , G06T11/00 , G09G2320/046 , G09G2340/0407
Abstract: An electronic device and a method for predicting and compensating for a residual image on a display are provided. The electronic device includes a display comprising a plurality of first pixels and a plurality of second pixels, a memory, and a processor. The processor configured to generate an image to be displayed through the display, group the image into a first image corresponding to the first pixels, and a second image corresponding to the second pixels, generate a first burn-in map by analyzing the first image, generate a second burn-in map by analyzing the second image, store the first burn-in map in a first memory region of the memory, store the second burn-in map in a second memory region of the memory, and display, through the display, the image having a burn-in or a residual image compensated for using the first burn-in map and the second burn-in map.
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公开(公告)号：US20230005835A1
公开(公告)日：2023-01-05
申请号：US17851129
申请日：2022-06-28
Applicant: Samsung Electronics Co., Ltd.
Inventor： Hyeonjun SONG , Taehyeong KIM , Sangyoung KIM
IPC: H01L23/498 , H01L25/065 , H01L23/31 , H01L23/29 , H01L23/00
Abstract: A semiconductor package includes a base chip including a passivation layer on an upper surface thereof, a semiconductor chip on the base chip, a bump on a lower surface of the semiconductor chip, an underfill layer covering the bump and covering the lower surface of the semiconductor chip, an encapsulant covering the semiconductor chip on the base chip, and an organic material layer on the passivation layer, wherein the base chip includes silicon (Si), the passivation layer has a first region in contact with the underfill layer and a second region, surrounding the first region, and the organic material layer is on the second region.
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公开(公告)号：US20210183821A1
公开(公告)日：2021-06-17
申请号：US17183786
申请日：2021-02-24
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Taehyeong KIM , Young Lyong KIM , Geol NAM
IPC: H01L25/065 , H01L23/00 , H01L23/31 , H01L21/56
Abstract: Disclosed are semiconductor packages and methods of manufacturing the same. The method of manufacturing a semiconductor package may include providing a carrier substrate having a trench formed on a first top surface of the carrier substrate, providing a first semiconductor chip on the carrier substrate, mounting at least one second semiconductor chip on a second top surface of the first semiconductor chip, coating a mold member to surround a first lateral surface of the first semiconductor chip and a second lateral surface of the at least one second semiconductor chip, and curing the mold member to form a mold layer. The trench may be provided along a first edge of the first semiconductor chip. The mold member may cover a second edge of a bottom surface the first semiconductor chip.
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公开(公告)号：US20210175134A1
公开(公告)日：2021-06-10
申请号：US17010059
申请日：2020-09-02
Applicant: Samsung Electronics Co., Ltd.
Inventor： Taehyeong KIM , Hyeongmun KANG , Seungduk BAEK
Abstract: Disclosed is a semiconductor package comprising a first semiconductor chip and at least one second semiconductor chip on the first semiconductor chip. The second semiconductor chip includes first and second test bumps that are adjacent to an edge of the second semiconductor chip and are on a bottom surface of the second semiconductor chip. The first and second test bumps are adjacent to each other. The second semiconductor chip also includes a plurality of data bumps that are adjacent to a center of the second semiconductor chip and are on the bottom surface of the second semiconductor chip. A first interval between the second test bump and one of the data bumps is greater than a second interval between the first test bump and the second test bump. The one of the data bumps is most adjacent to the second test bump.
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公开(公告)号：US20190229091A1
公开(公告)日：2019-07-25
申请号：US16225074
申请日：2018-12-19
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Taehyeong KIM , Young Lyong Kim , Geol Nam
IPC: H01L25/065 , H01L23/00 , H01L21/56 , H01L23/31
Abstract: Disclosed are semiconductor packages and methods of manufacturing the same. The method of manufacturing a semiconductor package may include providing a carrier substrate having a trench formed on a first top surface of the carrier substrate, providing a first semiconductor chip on the carrier substrate, mounting at least one second semiconductor chip on a second top surface of the first semiconductor chip, coating a mold member to surround a first lateral surface of the first semiconductor chip and a second lateral surface of the at least one second semiconductor chip, and curing the mold member to form a mold layer. The trench may be provided along a first edge of the first semiconductor chip. The mold member may cover a second edge of a bottom surface the first semiconductor chip.
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