Semiconductor device
    1.
    发明授权

    公开(公告)号:US10903676B2

    公开(公告)日:2021-01-26

    申请号:US15867893

    申请日:2018-01-11

    Abstract: The semiconductor device including first and second transistors configured to provide a first voltage to a first node, the first voltage being a voltage provided from a travel adaptor (TA), a third transistor connected in series with the second transistor and configured to provide a ground voltage to the first node, and a fourth transistor configured to receive a second voltage from a first inductor connected to the first node, and provide the second voltage to a second node as a third voltage for charging a battery connected thereto may be provided.

    Semiconductor device and method for operating semiconductor device

    公开(公告)号:US11209896B2

    公开(公告)日:2021-12-28

    申请号:US16381240

    申请日:2019-04-11

    Abstract: Provided are a semiconductor device and a method for operating the semiconductor device. A semiconductor device includes a low power condition module which determines whether a system operated by a battery satisfies enter and exit conditions of a low power mode; an address module which identifies a predetermined own address; a low power set module which sets a detailed operation mode of the low power mode in accordance with the address identified by the address module; a debounce module which executes a debounce operation before the system entering the low power mode; and a low power enter/exit module which executes entry and exit of the low power mode of the system.

    SEMICONDUCTOR DEVICE AND METHOD FOR OPERATING SEMICONDUCTOR DEVICE

    公开(公告)号:US20200073471A1

    公开(公告)日:2020-03-05

    申请号:US16381240

    申请日:2019-04-11

    Abstract: Provided are a semiconductor device and a method for operating the semiconductor device. A semiconductor device includes a low power condition module which determines whether a system operated by a battery satisfies enter and exit conditions of a low power mode; an address module which identifies a predetermined own address; a low power set module which sets a detailed operation mode of the low power mode in accordance with the address identified by the address module; a debounce module which executes a debounce operation before the system entering the low power mode; and a low power enter/exit module which executes entry and exit of the low power mode of the system.

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