公开(公告)号：US11744078B2

公开(公告)日：2023-08-29

申请号：US17085715

申请日：2020-10-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dawoon Jeong ,  Youngwoo Kim ,  Jaesung Kim ,  Hyoungryeol In

IPC: H10B43/50 ,  H10B43/10 ,  H10B43/27

CPC classification number: H10B43/50 ,  H10B43/10 ,  H10B43/27

Abstract: A semiconductor device includes a substrate having a first region and a second region, gate electrodes stacked and spaced apart from each other in a first direction, perpendicular to an upper surface of the substrate in the first region and extending in different lengths along a second direction, perpendicular to the first direction in the second region, first separation regions penetrating the gate electrodes in the first and second regions, extending in the second direction, and spaced apart from each other in a third direction, perpendicular to the first and second directions, second separation regions penetrating the gate electrodes in the second region and spaced apart from each other in the second direction between the separation regions, and a first vertical structure penetrating the gate electrodes in the second region and closest to the first region, wherein a width of the second separation regions in the third direction is greater than a width of the first vertical structure, a first end point of the second separation regions adjacent to the first region is spaced apart from a central axis of the first dummy structure in the second direction, away from the first region.

公开(公告)号：US12101937B2

公开(公告)日：2024-09-24

申请号：US18358993

申请日：2023-07-26

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dawoon Jeong ,  Youngwoo Kim ,  Jaesung Kim ,  Hyoungryeol In

IPC: H10B43/50 ,  H10B43/10 ,  H10B43/27

CPC classification number: H10B43/50 ,  H10B43/10 ,  H10B43/27

Abstract: A semiconductor device includes a substrate having a first region and a second region, gate electrodes stacked and spaced apart from each other in a first direction, perpendicular to an upper surface of the substrate in the first region and extending in different lengths along a second direction, perpendicular to the first direction in the second region, first separation regions penetrating the gate electrodes in the first and second regions, extending in the second direction, and spaced apart from each other in a third direction, perpendicular to the first and second directions, second separation regions penetrating the gate electrodes in the second region and spaced apart from each other in the second direction between the separation regions, and a first vertical structure penetrating the gate electrodes in the second region and closest to the first region, wherein a width of the second separation regions in the third direction is greater than a width of the first vertical structure, a first end point of the second separation regions adjacent to the first region is spaced apart from a central axis of the first dummy structure in the second direction, away from the first region.