公开(公告)号：US12068157B2

公开(公告)日：2024-08-20

申请号：US17385069

申请日：2021-07-26

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyun Seung Ha ,  Jang Hoon Kim ,  Tae-Kyu Kim ,  Young Kuk Byun ,  Jong Hyun Jung

IPC: H01L21/027 ,  G03F7/00 ,  G03F7/20 ,  H01L21/66

CPC classification number: H01L21/0274 ,  G03F7/70633 ,  H01L22/12

Abstract: A method of manufacturing a semiconductor device includes forming a first lower overlay key including first and second patterns in a lower layer, forming a first upper overlay key including third and fourth patterns in an upper layer vertically disposed on the lower layer, irradiating a first measurement light to a first region of interest (ROI) over first portions of the first and second patterns to detect a first overlay error and irradiating a second measurement light to a second ROI over second portions of the first and second patterns, the second ROI being different from the first ROI, to detect a second overlay error.