公开(公告)号：US12074738B2

公开(公告)日：2024-08-27

申请号：US17951482

申请日：2022-09-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jahoon Jin ,  Kyunghwan Min ,  Soomin Lee ,  Sang-Ho Kim ,  Jihoon Lim ,  Sodam Ju ,  Hyun Su Chea

IPC: H04L25/03 ,  H04B1/16 ,  H04L1/20 ,  H04L7/00

CPC classification number: H04L25/03878 ,  H04B1/16 ,  H04L1/205 ,  H04L7/0079

Abstract: A semiconductor device including a comparison circuit configured to receive an input signal having n signal levels, where n is a natural number equal to or greater than three, and output n−1 first signals having two signal levels. The device includes a jitter compensation circuit configured to receive the n−1 first signals and compensate for at least one of a length of a period in which a signal level of at least one of the n−1 first signals transitions from a first signal level to a second signal level different from the first signal level, and a length of a period in which the signal level of the at least one of the n−1 first signals transitions from the second signal level to the first signal level, to output n−1 second signals.