Electronic device for displaying indicator regarding network and method thereof

    公开(公告)号:US11191124B2

    公开(公告)日:2021-11-30

    申请号:US16521033

    申请日:2019-07-24

    摘要: An electronic device includes at least one wireless communication circuit; a display, a processor, and a memory configured to store first information associated with new radio (NR) cell searching, the memory storing instructions that, when executed, cause the processor to receive a system information block (SIB) including information indicating that evolved terrestrial radio access network (E-UTRAN) new radio-dual connectivity (EN-DC) is possible, from a long-term evolution (LTE) base station by using the at least one wireless communication circuit; select a cell of the LTE base station based at least partly on the SIB, using the at least one wireless communication circuit; display a first indicator associated with availability of LTE on a partial region of the display, in response to selecting the cell of the LTE base station; after selecting the cell of the LTE base station, perform the NR cell searching based at least partly on the first information, using the at least one wireless communication circuit; display a second indicator associated with availability of NR on the partial region of the display, based at least partly on the result of the NR cell searching; and display a third indicator obtained by changing at least part of a color or shading of the second indicator, on the partial region of the display in response to performing data transmission to an NR base station after determining the result of the NR cell searching.

    Method of calibrating clock phase and voltage offset, data recovery circuit performing the same and receiver including the same

    公开(公告)号:US10972248B2

    公开(公告)日:2021-04-06

    申请号:US16715289

    申请日:2019-12-16

    摘要: A method of calibrating a clock phase and a voltage offset includes receiving an input data signal that is periodically toggled. A clock phase calibration operation is performed based on an up signal and a down signal, such that phases of a plurality of clock signals are adjusted. The up signal and the down signal are generated based on the input data signal, a reference voltage and the plurality of clock signals. A voltage offset calibration operation is performed based on the up signal, the down signal and a first sample data signal, such that a voltage level of the reference voltage is adjusted. The first sample data signal is generated by sampling the input data signal based on one of the plurality of clock signals. The clock phase calibration operation and the voltage offset calibration operation are performed independently of each other and not to overlap with each other.

    Electronic circuit capable of selectively compensating for crosstalk noise and inter-symbol interference

    公开(公告)号:US10937488B2

    公开(公告)日:2021-03-02

    申请号:US16543765

    申请日:2019-08-19

    发明人: Soomin Lee

    摘要: An electronic circuit including: a driver for outputting a driven first signal by driving a first signal among signals received in parallel; a selector circuit for selecting one of the first signal and a second signal among the signals received in parallel; and a compensator circuit for generating a first compensation signal for compensating the driven first signal, in response to the first signal or the second signal selected by the selector circuit, wherein, when the selector circuit selects the first signal, the compensator circuit generates the first compensation signal to compensate for an inter-symbol interference of the driven first signal, and wherein, when the selector circuit selects the second signal, the compensator circuit generates the first compensation signal to compensate for a crosstalk noise of the driven first signal caused by a driven second signal driven from the second signal.

    Electronic device supporting addition of secondary node, and method therefor

    公开(公告)号:US11956843B2

    公开(公告)日:2024-04-09

    申请号:US17299856

    申请日:2019-10-17

    摘要: Disclosed according to various embodiments is an electronic device comprising: a first communication circuit configured to provide first wireless communication within a first frequency range; a second communication circuit configured to provide second wireless communication within a second frequency range; a processor operably connected to the first communication circuit and the second communication circuit; and a memory operably connected to the processor, wherein the memory has instructions stored therein which cause, when executed, the processor to: establish a channel for communication with a first base station, by using the first communication circuit; receive, from the first base station, a first message containing information about at least one frequency at which to assess a communication status by using the second communication circuit; assess statuses for communication with one or more second base stations, by using the second communication circuit on the basis of the first message; transmit a second message concerning the one or more second base stations to the first base station on the basis of results obtained by the assessment; receive, from the first base station, a third message containing information about a selected second base station and timer information on the basis of the second message; start a timer on the basis of the timer information and then, by using the second communication circuit, assess a status for communication with the selected second base station on the basis of a signal received from the selected second base station; and transmit a fourth message containing information about the selected second base station to the first base station before the end of the timer on the basis of results obtained by the assessment. Various other embodiments found through the specification are also possible.

    Semiconductor device
    7.
    发明授权

    公开(公告)号:US12074738B2

    公开(公告)日:2024-08-27

    申请号:US17951482

    申请日:2022-09-23

    摘要: A semiconductor device including a comparison circuit configured to receive an input signal having n signal levels, where n is a natural number equal to or greater than three, and output n−1 first signals having two signal levels. The device includes a jitter compensation circuit configured to receive the n−1 first signals and compensate for at least one of a length of a period in which a signal level of at least one of the n−1 first signals transitions from a first signal level to a second signal level different from the first signal level, and a length of a period in which the signal level of the at least one of the n−1 first signals transitions from the second signal level to the first signal level, to output n−1 second signals.

    Electronic device and method for processing call request in electronic device

    公开(公告)号:US11863594B2

    公开(公告)日:2024-01-02

    申请号:US17570777

    申请日:2022-01-07

    CPC分类号: H04L65/1066 H04L65/1016

    摘要: According to various embodiments, an electronic device may comprise: a memory, at least one antenna module comprising at least one antenna, and at least one communication processor. The at least one communication processor may be configured to: control the electronic device to perform a call by voice communication connection through a second communication network, in response to receiving a first call request, based on identifying that the call is disconnected, identify information related to a call disconnected cause, based on identifying that the identified information related to the call disconnected cause corresponds to a designated condition, start a timer for deferring connection to a first communication network, and in response to receiving a second call request before the timer expires, control the electronic device to perform a voice communication connection through the second communication network currently connected the electronic device.