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公开(公告)号:US20250087465A1
公开(公告)日:2025-03-13
申请号:US18598037
申请日:2024-03-07
Applicant: Samsung Electronics Co., Ltd.
Inventor: Hyungsik Ko
IPC: H01J37/32 , H01L21/67 , H01L21/683
Abstract: Provided is a substrate processing apparatus including a chamber, an electrostatic chuck (ESC) in the chamber and configured to support a substrate, a shower head in the chamber and on the electrostatic chuck, and a ring assembly for a semiconductor process in the chamber and surrounding the electrostatic chuck, wherein the ring assembly for the semiconductor process includes a focus ring having a central axis extending in a first direction, an outer ring surrounding the focus ring, and a top ring on a top surface of the outer ring.
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公开(公告)号:US20240371610A1
公开(公告)日:2024-11-07
申请号:US18517271
申请日:2023-11-22
Applicant: Samsung Electronics Co., Ltd.
Inventor: Hyungsik Ko
IPC: H01J37/32 , H01L21/683
Abstract: A focus ring includes an inner ring on a periphery of an electrostatic chuck, and an outer ring having an inner circumferential surface surrounding an outer circumferential surface of the inner ring, wherein a lower gap between a lower end of the outer circumferential surface of the inner ring and a lower end of the inner circumferential surface of the outer ring is narrower than an upper gap between an upper end of the outer circumferential surface of the inner ring and an upper end of the inner circumferential surface of the outer ring, and wherein the outer ring includes a thickness-compensating portion on the inner circumferential surface of the outer ring, the thickness-compensating portion being positioned higher than an imaginary straight line between the upper end and the lower end of the inner circumferential surface of the outer ring.
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公开(公告)号:US12009187B2
公开(公告)日:2024-06-11
申请号:US18208046
申请日:2023-06-09
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Hyungsik Ko
IPC: H01J37/32
CPC classification number: H01J37/32807 , H01J37/32495 , H01J37/32513
Abstract: Provided is a substrate processing apparatus, including a process chamber, a plasma shutter configured ascend to close the process chamber, and an upper liner on the process chamber, wherein the process chamber includes a process space in which a substrate process is performed, and an insertion passage adjacent to the process space and connecting the process space to an outside of the process chamber, wherein the upper liner includes an extension liner, wherein the extension liner faces a connection inner surface that upwardly extends from an inner end of a passage ceiling forming the insertion passage, and wherein, in a state where the plasma shutter ascends to close the process space, an upper end of the plasma shutter is inserted between the connection inner surface and the extension liner.
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