公开(公告)号：US20240006356A1

公开(公告)日：2024-01-04

申请号：US18181731

申请日：2023-03-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： INHYO HWANG ,  YOUNG LYONG KIM ,  HYUNSOO CHUNG

IPC: H01L23/00 ,  H01L21/66 ,  H01L23/58 ,  H10B80/00 ,  H01L21/78

CPC classification number: H01L24/06 ,  H01L22/32 ,  H01L23/562 ,  H01L23/564 ,  H01L23/585 ,  H01L24/08 ,  H01L2924/35121 ,  H01L21/78 ,  H01L22/12 ,  H01L2224/06517 ,  H01L2224/08145 ,  H01L2924/1431 ,  H01L2924/14511 ,  H10B80/00

Abstract: A semiconductor device may include a first substrate including device and edge regions, a first insulating structure on the first substrate, first metal pads and first dummy pads at the uppermost end of the first insulating structure, a second insulating structure on the first insulating structure, second metal pads and second dummy pads at the lowermost end of the second insulating structure, a first interconnection structure in the first insulating structure, electrically connected to the first metal pads and electrically isolated from the first dummy pads, and a second interconnection structure in the second insulating structure, electrically connected to the second metal pads, and electrically isolated from the second dummy pads. Ones of the first metal pads may be in contact with respective ones of the second metal pads on the device region, and ones of the first dummy pads may be in contact with respective ones of the second dummy pads on the edge region.

公开(公告)号：US20220415809A1

公开(公告)日：2022-12-29

申请号：US17539963

申请日：2021-12-01

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： YOUNG LYONG KIM ,  HYUNSOO CHUNG ,  INHYO HWANG

IPC: H01L23/538 ,  H01L23/31 ,  H01L25/065

Abstract: A semiconductor package includes a package substrate with a first vent hole, a first semiconductor chip mounted the package substrate, an interposer including supporters on a bottom surface of the interposer and a second vent hole, wherein the supporters contact a top surface of the first semiconductor chip, and the interposer is electrically connected to the package substrate through connection terminals. The semiconductor package further include a second semiconductor chip mounted on the interposer, and a molding layer disposed on the package substrate to cover the first semiconductor chip, the interposer, and the second semiconductor chip.

公开(公告)号：US20230023883A1

公开(公告)日：2023-01-26

申请号：US17568361

申请日：2022-01-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： HYUNSOO CHUNG ,  YOUNG LYONG KIM ,  INHYO HWANG

IPC: H01L25/065 ,  H01L23/31 ,  H01L23/498 ,  H01L23/00 ,  H01L25/00

Abstract: A semiconductor package includes a first semiconductor chip on a substrate, a buried solder ball on the substrate and spaced apart from the first semiconductor chip, a first molding layer on the substrate and encapsulating and exposing the first semiconductor chip and the buried solder ball, a second semiconductor chip on the first molding layer and vertically overlapping the buried solder ball and a portion of the first semiconductor chip, and a second molding layer on the first molding layer and covering the second semiconductor chip. The second semiconductor chip is supported on the first semiconductor chip through a dummy solder ball between the first and second semiconductor chips. The second semiconductor chip is connected to the buried solder ball through a signal solder ball between the buried solder ball and the second semiconductor chip.

公开(公告)号：US20230005814A1

公开(公告)日：2023-01-05

申请号：US17705931

申请日：2022-03-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： HYUNSOO CHUNG ,  YOUNGLYONG KIM ,  INHYO HWANG

IPC: H01L23/427 ,  H01L23/498

Abstract: A semiconductor package includes an interposer, a first semiconductor chip attached onto the interposer, second semiconductor chips stacked on the first semiconductor chip, at least two heat sinks mounted on the interposer and spaced apart from the second semiconductor chips, and a molding layer surrounding the second semiconductor chips and the at least two heat sinks.