公开(公告)号：US20220413038A1

公开(公告)日：2022-12-29

申请号：US17806467

申请日：2022-06-10

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： SUNWOO KIM ,  MINSEOB KIM ,  JUHYUN KIM

IPC: G01R31/28 ,  H01L21/66

Abstract: A test device includes semiconductor substrate, gate lines disposed on an upper surface of the semiconductor substrate and extending in a first direction parallel to the upper surface, a test element group including test transistors defined by the gate lines and by active regions extending in a second direction perpendicular to the first direction and intersecting the gate lines, and metal wirings disposed on the semiconductor substrate and electrically connected to the active regions and/or the gate lines, and a test circuit electrically connected to the metal wirings and configured to measure resistance of the test transistors. The gate lines include first gate lines and second gate lines disposed alternately, with the spacing between first gate lines and second gate lines alternating between a first distance and a second distance greater than the first distance.

公开(公告)号：US20210231727A1

公开(公告)日：2021-07-29

申请号：US17023656

申请日：2020-09-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： JUHUN PARK ,  JUHYUN KIM ,  DEOKHAN BAE ,  MYUNGYOON UM

IPC: G01R31/26 ,  H01L21/66

Abstract: A method of testing a semiconductor device may include preparing a semiconductor substrate in which the semiconductor substrate includes a test element group including first and second test circuits, measuring first and second leakage currents in the first and second test circuits, respectively, and calculating leakage components by comparing the first and second leakage currents. Each of the first and second test circuits may include an active region, which is an upper portion of the semiconductor substrate, a gate electrode, which is configured to cross the active region and to extend in a first direction, and an active contact, which is on the active region, is spaced apart from the gate electrode, and extends in the first direction. The second test circuit may further include a first gate contact that is connected to the gate electrode and overlaps the active region in a vertical direction perpendicular to the substrate.