公开(公告)号：US20240204026A1

公开(公告)日：2024-06-20

申请号：US18223307

申请日：2023-07-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： JUNGHOON KANG ,  UN-BYOUNG KANG ,  SEUNGWAN SHIN ,  JUNG HYUN LEE

IPC: H01L27/146

CPC classification number: H01L27/14634 ,  H01L27/14618 ,  H01L27/14623 ,  H01L27/14636

Abstract: An image sensor package according to an embodiment includes: a substrate including a metal portion; an image sensor chip on the substrate; and a transparent glass cover disposed on the substrate and including an upper plate and sidewalls, the upper plate and the sidewalls defined by a cavity at a lower portion and spaced from the image sensor chip, wherein the sidewalls are directly bonded to the metal portion of the substrate, and the image sensor chip is sealed by the transparent glass cover and the substrate.

公开(公告)号：US20240234268A9

公开(公告)日：2024-07-11

申请号：US18204161

申请日：2023-05-31

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： SEUNGWAN SHIN ,  JUNGHOON KANG ,  BYUNGMIN YU ,  JUNG HYUN LEE

IPC: H01L23/498 ,  H01L23/31

CPC classification number: H01L23/49811 ,  H01L23/3128 ,  H01L23/49838

Abstract: A semiconductor package includes: a first redistribution substrate; a semiconductor chip provided on the first redistribution substrate; a molding material molding the semiconductor chip and the first redistribution substrate; and a second redistribution substrate provided on the molding material, wherein the second redistribution substrate includes: at least one redistribution line; a metal pad; and a dielectric layer molding the at least one redistribution line and the metal pad, wherein the dielectric layer includes a marking region on the metal pad, and the metal pad includes a plurality of concave portions.

公开(公告)号：US20240136261A1

公开(公告)日：2024-04-25

申请号：US18204161

申请日：2023-05-30

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： SEUNGWAN SHIN ,  JUNGHOON KANG ,  BYUNGMIN YU ,  JUNG HYUN LEE

IPC: H01L23/498 ,  H01L23/31

CPC classification number: H01L23/49811 ,  H01L23/3128 ,  H01L23/49838

Abstract: A semiconductor package includes: a first redistribution substrate; a semiconductor chip provided on the first redistribution substrate; a molding material molding the semiconductor chip and the first redistribution substrate; and a second redistribution substrate provided on the molding material, wherein the second redistribution substrate includes: at least one redistribution line; a metal pad; and a dielectric layer molding the at least one redistribution line and the metal pad, wherein the dielectric layer includes a marking region on the metal pad, and the metal pad includes a plurality of concave portions.