公开(公告)号：US20250105235A1

公开(公告)日：2025-03-27

申请号：US18620416

申请日：2024-03-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： JUNGHOON KANG

IPC: H01L25/18 ,  H01L23/00 ,  H01L23/31 ,  H01L23/48 ,  H01L23/498 ,  H01L25/00 ,  H01L25/10

Abstract: A semiconductor package includes a first redistribution substrate, a first semiconductor chip having first pads on the first semiconductor chip, a second redistribution substrate on the first semiconductor chip, a first vertical connection structure through which the first and second redistribution substrates are electrically connected on one side of the first semiconductor chip, a second semiconductor chip on the second redistribution substrate, a first molding layer that covers the second semiconductor chip on the second redistribution substrate, a third redistribution substrate on the first molding layer; and a second vertical connection structure which is coupled to the second redistribution substrate and through which the second and third redistribution substrates are electrically connected on one side of the second semiconductor chip. A wiring pattern of the second redistribution substrate is coupled to the first pads of the first semiconductor chip.

公开(公告)号：US20250079287A1

公开(公告)日：2025-03-06

申请号：US18744813

申请日：2024-06-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： JUNGHOON KANG

IPC: H01L23/498 ,  H01L23/00 ,  H01L23/29 ,  H01L23/538 ,  H01L25/18

Abstract: A semiconductor package may include a redistribution substrate that includes a redistribution pattern and a redistribution insulating layer; a semiconductor chip on the redistribution substrate; a connection structure that is spaced apart from the semiconductor chip; and a hybrid via on the connection structure, wherein the hybrid via comprises an inclined portion and an extended portion on the inclined portion, and wherein an angle between the inclined portion and an upper surface of the connection structure ranges from 50° to 75°.

公开(公告)号：US20240204026A1

公开(公告)日：2024-06-20

申请号：US18223307

申请日：2023-07-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： JUNGHOON KANG ,  UN-BYOUNG KANG ,  SEUNGWAN SHIN ,  JUNG HYUN LEE

IPC: H01L27/146

CPC classification number: H01L27/14634 ,  H01L27/14618 ,  H01L27/14623 ,  H01L27/14636

Abstract: An image sensor package according to an embodiment includes: a substrate including a metal portion; an image sensor chip on the substrate; and a transparent glass cover disposed on the substrate and including an upper plate and sidewalls, the upper plate and the sidewalls defined by a cavity at a lower portion and spaced from the image sensor chip, wherein the sidewalls are directly bonded to the metal portion of the substrate, and the image sensor chip is sealed by the transparent glass cover and the substrate.

公开(公告)号：US20250038115A1

公开(公告)日：2025-01-30

申请号：US18438357

申请日：2024-02-09

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： JUNGHOON KANG

IPC: H01L23/538 ,  H01L23/00 ,  H01L23/31 ,  H01L25/065

Abstract: A semiconductor package includes a lower redistribution substrate, a module structure on the lower redistribution substrate, a connection substrate on the lower redistribution substrate and at sides of the module structure, a dielectric member on the lower redistribution substrate between the connection substrate and the module structure, and an upper redistribution substrate on the dielectric member. The module structure includes an interposer substrate, a first semiconductor chip, and a molding layer. The molding layer and the dielectric member include different materials. A first via in a first vertical hole vertically penetrates the dielectric member and the molding layer. The first via connects a wiring pattern of the upper redistribution substrate to a top surface of the first semiconductor chip.

公开(公告)号：US20240234268A9

公开(公告)日：2024-07-11

申请号：US18204161

申请日：2023-05-31

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： SEUNGWAN SHIN ,  JUNGHOON KANG ,  BYUNGMIN YU ,  JUNG HYUN LEE

IPC: H01L23/498 ,  H01L23/31

CPC classification number: H01L23/49811 ,  H01L23/3128 ,  H01L23/49838

Abstract: A semiconductor package includes: a first redistribution substrate; a semiconductor chip provided on the first redistribution substrate; a molding material molding the semiconductor chip and the first redistribution substrate; and a second redistribution substrate provided on the molding material, wherein the second redistribution substrate includes: at least one redistribution line; a metal pad; and a dielectric layer molding the at least one redistribution line and the metal pad, wherein the dielectric layer includes a marking region on the metal pad, and the metal pad includes a plurality of concave portions.

公开(公告)号：US20240136261A1

公开(公告)日：2024-04-25

申请号：US18204161

申请日：2023-05-30

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： SEUNGWAN SHIN ,  JUNGHOON KANG ,  BYUNGMIN YU ,  JUNG HYUN LEE

IPC: H01L23/498 ,  H01L23/31

CPC classification number: H01L23/49811 ,  H01L23/3128 ,  H01L23/49838

Abstract: A semiconductor package includes: a first redistribution substrate; a semiconductor chip provided on the first redistribution substrate; a molding material molding the semiconductor chip and the first redistribution substrate; and a second redistribution substrate provided on the molding material, wherein the second redistribution substrate includes: at least one redistribution line; a metal pad; and a dielectric layer molding the at least one redistribution line and the metal pad, wherein the dielectric layer includes a marking region on the metal pad, and the metal pad includes a plurality of concave portions.