公开(公告)号：US20210151610A1

公开(公告)日：2021-05-20

申请号：US17134611

申请日：2020-12-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jae-Jung KIM ,  Dong-Soo LEE ,  Sang-Yong KIM ,  Jin-Kyu JANG ,  Won-Keun CHUNG ,  Sang-Jin HYUN

IPC: H01L29/792 ,  H01L27/092 ,  H01L29/49 ,  H01L29/78 ,  H01L21/8234 ,  H01L21/8238 ,  H01L21/28 ,  H01L29/66 ,  H01L29/423 ,  H01L29/06 ,  H01L29/775 ,  H01L29/10 ,  B82Y10/00 ,  H01L29/786 ,  H01L27/088

Abstract: A semiconductor device includes a first transistor having a first threshold voltage, and including first channels, first source/drain layers connected to opposite sidewalls of the first channels, and a first gate structure surrounding the first channels and including a first gate insulation pattern, a first threshold voltage control pattern, and a first workfunction metal pattern sequentially stacked. The semiconductor device includes a second transistor having a second threshold voltage greater than the first threshold voltage, and including second channels, second source/drain layers connected to opposite sidewalls of the second channels, and a second gate structure surrounding the second channels and including a second gate insulation pattern, a second threshold voltage control pattern, and a second workfunction metal pattern sequentially stacked. A thickness of the second threshold voltage control pattern is equal to or less than a thickness of the first threshold voltage control pattern.

公开(公告)号：US20150294873A1

公开(公告)日：2015-10-15

申请号：US14636257

申请日：2015-03-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Huyong LEE ,  Jae-Jung KIM ,  Wandon KIM ,  Sangjin HYUN

IPC: H01L21/28 ,  H01L29/423 ,  H01L29/49 ,  H01L21/283

CPC classification number: H01L27/11521 ,  H01L29/40114 ,  H01L29/42336 ,  H01L29/66795 ,  H01L29/66825 ,  H01L29/785

Abstract: Provided is a method of fabricating a semiconductor device, including forming an interlayered insulating layer having an opening, on a substrate; sequentially forming a first conductive pattern, a barrier pattern, and a second conductive pattern on bottom and side surfaces of the opening; and nitrifying an upper portion of the second conductive pattern to form a metal nitride layer that is spaced apart from the first conductive pattern.

Abstract translation: 提供一种制造半导体器件的方法，包括在衬底上形成具有开口的层间绝缘层; 在开口的底部和侧表面上依次形成第一导电图案，阻挡图案和第二导电图案; 并且硝化第二导电图案的上部以形成与第一导电图案间隔开的金属氮化物层。

公开(公告)号：US20220254884A1

公开(公告)日：2022-08-11

申请号：US17503764

申请日：2021-10-18

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jae-Jung KIM ,  Sang Yong KIM ,  Byoung Hoon LEE ,  Chan Hyeong LEE

IPC: H01L29/06 ,  H01L29/423

Abstract: A semiconductor device includes an active pattern disposed on a substrate. A gate insulating film is disposed on the active pattern and extends along the active pattern. A work function adjustment pattern is disposed on the gate insulating film and extends along the gate insulating film. A gate electrode is disposed on the work function adjustment pattern. The work function adjustment pattern includes a first work function adjustment film, a second work function adjustment film that includes aluminum and wraps the first work function adjustment film, and a barrier film including titanium silicon nitride (TiSiN). A silicon concentration of the barrier film is in a range of about 30 at % or less.

公开(公告)号：US20190088798A1

公开(公告)日：2019-03-21

申请号：US16040807

申请日：2018-07-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jae-Jung KIM ,  Dong-Soo LEE ,  Sang-Yong KIM ,  Jin-Kyu JANG ,  Won-Keun CHUNG ,  Sang-Jin HYUN

IPC: H01L29/792 ,  H01L27/092 ,  H01L29/49 ,  H01L29/66 ,  H01L21/8234 ,  H01L21/8238 ,  H01L21/28 ,  H01L29/78

CPC classification number: H01L29/7926 ,  H01L21/28088 ,  H01L21/82345 ,  H01L21/823842 ,  H01L27/0922 ,  H01L29/42392 ,  H01L29/4966 ,  H01L29/66545 ,  H01L29/785 ,  H01L29/78696

Abstract: A semiconductor device includes a first transistor having a first threshold voltage, and including first channels, first source/drain layers connected to opposite sidewalls of the first channels, and a first gate structure surrounding the first channels and including a first gate insulation pattern, a first threshold voltage control pattern, and a first workfunction metal pattern sequentially stacked. The semiconductor device includes a second transistor having a second threshold voltage greater than the first threshold voltage, and including second channels, second source/drain layers connected to opposite sidewalls of the second channels, and a second gate structure surrounding the second channels and including a second gate insulation pattern, a second threshold voltage control pattern, and a second workfunction metal pattern sequentially stacked. A thickness of the second threshold voltage control pattern is equal to or less than a thickness of the first threshold voltage control pattern.

公开(公告)号：US20220352389A1

公开(公告)日：2022-11-03

申请号：US17863127

申请日：2022-07-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jae-Jung KIM ,  Dong-Soo LEE ,  Sang-Yong KIM ,  Jin-Kyu JANG ,  Won-Keun CHUNG ,  Sang-Jin HYUN

IPC: H01L29/792 ,  H01L27/092 ,  H01L29/49 ,  H01L29/78 ,  H01L21/8234 ,  H01L21/8238 ,  H01L21/28 ,  H01L29/66 ,  H01L29/423 ,  H01L29/06 ,  H01L29/775 ,  H01L29/10 ,  B82Y10/00 ,  H01L29/786 ,  H01L27/088

Abstract: A semiconductor device includes a first transistor having a first threshold voltage, and including first channels, first source/drain layers connected to opposite sidewalls of the first channels, and a first gate structure surrounding the first channels and including a first gate insulation pattern, a first threshold voltage control pattern, and a first workfunction metal pattern sequentially stacked. The semiconductor device includes a second transistor having a second threshold voltage greater than the first threshold voltage, and including second channels, second source/drain layers connected to opposite sidewalls of the second channels, and a second gate structure surrounding the second channels and including a second gate insulation pattern, a second threshold voltage control pattern, and a second workfunction metal pattern sequentially stacked. A thickness of the second threshold voltage control pattern is equal to or less than a thickness of the first threshold voltage control pattern.

公开(公告)号：US20200035842A1

公开(公告)日：2020-01-30

申请号：US16532645

申请日：2019-08-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jae-Jung KIM ,  Dong-Soo LEE ,  Sang-Yong KIM ,  Jin-Kyu JANG ,  Won-Keun CHUNG ,  Sang-Jin HYUN

IPC: H01L29/792 ,  H01L29/66 ,  H01L29/423 ,  H01L29/06 ,  H01L29/775 ,  H01L27/092 ,  H01L29/10 ,  B82Y10/00 ,  H01L29/786 ,  H01L27/088 ,  H01L29/49 ,  H01L29/78 ,  H01L21/8234 ,  H01L21/8238 ,  H01L21/28

Abstract: A semiconductor device includes a first transistor having a first threshold voltage, and including first channels, first source/drain layers connected to opposite sidewalls of the first channels, and a first gate structure surrounding the first channels and including a first gate insulation pattern, a first threshold voltage control pattern, and a first workfunction metal pattern sequentially stacked. The semiconductor device includes a second transistor having a second threshold voltage greater than the first threshold voltage, and including second channels, second source/drain layers connected to opposite sidewalls of the second channels, and a second gate structure surrounding the second channels and including a second gate insulation pattern, a second threshold voltage control pattern, and a second workfunction metal pattern sequentially stacked. A thickness of the second threshold voltage control pattern is equal to or less than a thickness of the first threshold voltage control pattern.