公开(公告)号：US20220383790A1

公开(公告)日：2022-12-01

申请号：US17745246

申请日：2022-05-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jeeyeon EOM ,  Jeonghoon CHOI ,  Yeongshin JANG ,  Youngbae MOON ,  Woonyoung LEE

IPC: G09G3/20

Abstract: Provided is a display driving circuit including a plurality of source channels configured to provide data voltages to a plurality of data lines of a display panel, respectively; a dummy channel on one side of at least one of the source channels; and control logic configured to control operations of the source channels and the dummy channel, wherein, when failure of a first source channel from among the source channels is determined, the control logic is further configured to provide data voltages to data lines corresponding to the first source channel and second source channels, respectively, which are between the first source channel and the dummy channel, by using the second source channels and the dummy channel.

公开(公告)号：US20210264860A1

公开(公告)日：2021-08-26

申请号：US17026639

申请日：2020-09-21

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jeeyeon EOM ,  Soonchan KWON ,  Kyungjik MIN ,  Yeongshin JANG ,  Jeonghoon CHOI ,  Siwoo KIM ,  Jaeyoun LEE

IPC: G09G3/3275 ,  G09G3/3258

Abstract: A display driving integrated circuit includes a timing controller, a first source driver including a first inverting input, a first non-inverting input, and a first output, a second source driver including a second inverting input, a second non-inverting input, and a second output, and a switching circuit connected with the display panel through a first and second pads. Under control of the timing controller, the switching circuit performs one of a first switching operation of connecting the first inverting input and the first output with the first pad, connecting the second inverting input and the second output with the second pad, and applying first and second decoding voltages to the non-inverting inputs, respectively; and a second switching operation of applying a sensing reference voltage to the non-inverting inputs, and connecting the output terminals with an output node, and connecting the inverting inputs with one pad.