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公开(公告)号:US20230403185A1
公开(公告)日:2023-12-14
申请号:US18033670
申请日:2021-09-01
Applicant: Samsung Electronics Co., Ltd.
Inventor: Joonho CHO , Jeonghoon CHOI
CPC classification number: H04L25/03828 , H04L27/0008 , H04L27/2636 , H04L5/001
Abstract: Provided are a discrete Fourier transform (DFT)-spread orthogonal frequency division multiplexing (OFDM) transmitter and transmission method, and a DFT-spread OFDM receiver and reception method which may receive signals transmitted thereby, in which a constellation rotation angle and a frequency domain spectrum shaping vector are designed such that a PAPR may be easily traded off with frequency efficiency even without inter-symbol interference. The DFT-spread OFDM transmitter includes a constellation rotation unit constellation-rotating a symbol vector including M pulse amplitude modulation (PAM) symbols by a constellation rotation angle to generate a constellation-rotated symbol vector, a pruned DFT-spread unit spreading the constellation-rotated symbol vector by using a pruned DFT matrix to generate a pruned DFT-spread vector, a frequency domain spectrum shaping unit performing a Hadamard product on the pruned DFT-spread vector with a shaping vector to generate a frequency domain spectrum shaped vector, and a subcarrier allocation unit allocating the frequency domain spectrum shaped vector to a subcarrier in an allocated frequency range.
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公开(公告)号:US20230275798A1
公开(公告)日:2023-08-31
申请号:US18313699
申请日:2023-05-08
Inventor: Kyeongyeon KIM , Joonho CHO , Jeonghoon CHOI
CPC classification number: H04L27/3854 , H04L27/2655 , H04L25/4917 , H04L27/22
Abstract: The disclosure relates to a communication technique and a system for converging a fifth generation (5G) and subsequent communication system with Internet of things (IoT) technology to support a higher data transmission rate than a fourth generation (4G) system. The disclosure is applied to the intelligent service based on the 5G and subsequent communication technology and IoT-related technology. The reception device according to the disclosure receives orthogonal frequency division multiplexing (OFDM) signals through a plurality of antennas, aligns the received OFDM signals, converts at least one of the aligned reception signals into a designated symbol, estimates the data symbols of the reception signals based on the designated condition, and determines the data symbol of the reception signals by synthesizing at least one of the converted reception signals among the estimated reception signals.
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公开(公告)号:US20220383790A1
公开(公告)日:2022-12-01
申请号:US17745246
申请日:2022-05-16
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jeeyeon EOM , Jeonghoon CHOI , Yeongshin JANG , Youngbae MOON , Woonyoung LEE
IPC: G09G3/20
Abstract: Provided is a display driving circuit including a plurality of source channels configured to provide data voltages to a plurality of data lines of a display panel, respectively; a dummy channel on one side of at least one of the source channels; and control logic configured to control operations of the source channels and the dummy channel, wherein, when failure of a first source channel from among the source channels is determined, the control logic is further configured to provide data voltages to data lines corresponding to the first source channel and second source channels, respectively, which are between the first source channel and the dummy channel, by using the second source channels and the dummy channel.
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公开(公告)号:US20210264860A1
公开(公告)日:2021-08-26
申请号:US17026639
申请日:2020-09-21
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Jeeyeon EOM , Soonchan KWON , Kyungjik MIN , Yeongshin JANG , Jeonghoon CHOI , Siwoo KIM , Jaeyoun LEE
IPC: G09G3/3275 , G09G3/3258
Abstract: A display driving integrated circuit includes a timing controller, a first source driver including a first inverting input, a first non-inverting input, and a first output, a second source driver including a second inverting input, a second non-inverting input, and a second output, and a switching circuit connected with the display panel through a first and second pads. Under control of the timing controller, the switching circuit performs one of a first switching operation of connecting the first inverting input and the first output with the first pad, connecting the second inverting input and the second output with the second pad, and applying first and second decoding voltages to the non-inverting inputs, respectively; and a second switching operation of applying a sensing reference voltage to the non-inverting inputs, and connecting the output terminals with an output node, and connecting the inverting inputs with one pad.
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