-
1.发明授权公开(公告)号：US11836006B2
公开(公告)日：2023-12-05
申请号：US17003291
申请日：2020-08-26
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Jeongkyu Ha
CPC classification number: G06F1/1652 , G06F1/181 , G06F1/189 , G09F9/301 , H01L33/48
Abstract: A chip-on-film (COF) package includes a film including a reinforcement area, a bending area and a chip mounting area, a conductive pattern layer disposed on the film in the reinforcement area and in the bending area, and at least partially in the chip mounting area, a chip mounted on a portion of the conductive pattern layer in the chip mounting area, a first insulating layer having a first elastic modulus and extending over the conductive pattern layer in the reinforcement area, and a second insulating layer having a second elastic modulus and extending over the conductive pattern layer in the bending area, wherein the first elastic modulus is greater than the second elastic modulus, and the film is intact in the chip mounting area.
-
2.发明授权公开(公告)号：US12085990B2
公开(公告)日：2024-09-10
申请号：US18340681
申请日：2023-06-23
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Jeongkyu Ha
CPC classification number: G06F1/1652 , G06F1/181 , G06F1/189 , G09F9/301 , H01L33/48
Abstract: A chip-on-film (COF) package includes a film including a reinforcement area, a bending area and a chip mounting area, a conductive pattern layer disposed on the film in the reinforcement area and in the bending area, and at least partially in the chip mounting area, a chip mounted on a portion of the conductive pattern layer in the chip mounting area, a first insulating layer having a first elastic modulus and extending over the conductive pattern layer in the reinforcement area, and a second insulating layer having a second elastic modulus and extending over the conductive pattern layer in the bending area, wherein the first elastic modulus is greater than the second elastic modulus, and the film is intact in the chip mounting area.
-
3.发明授权公开(公告)号：US12148337B2
公开(公告)日：2024-11-19
申请号：US17679587
申请日：2022-02-24
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Sanguk Han , Jaemin Jung , Jeongkyu Ha , Kwanjai Lee
IPC: H01L23/532 , G09G3/20 , H01L23/00
Abstract: A chip on film package is provided. The chip on film package includes a film substrate with a base film, a conductive pad extending in a first direction on the base film, and a conductive line pattern extending from the conductive pad; a semiconductor chip provided on the film substrate; and a bump structure provided between the semiconductor chip and the conductive pad. A first peripheral wall and a second peripheral wall of the bump structure extend in the first direction and define a trench, a portion of the conductive pad is provided in the trench, and the conductive pad is spaced apart from at least one of the first peripheral wall and the second peripheral wall.
-
4.发明公开公开(公告)号：US20230333599A1
公开(公告)日：2023-10-19
申请号：US18340681
申请日：2023-06-23
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Jeongkyu Ha
CPC classification number: G06F1/1652 , G06F1/181 , G06F1/189 , G09F9/301 , H01L33/48
Abstract: A chip-on-film (COF) package includes a film including a reinforcement area, a bending area and a chip mounting area, a conductive pattern layer disposed on the film in the reinforcement area and in the bending area, and at least partially in the chip mounting area, a chip mounted on a portion of the conductive pattern layer in the chip mounting area, a first insulating layer having a first elastic modulus and extending over the conductive pattern layer in the reinforcement area, and a second insulating layer having a second elastic modulus and extending over the conductive pattern layer in the bending area, wherein the first elastic modulus is greater than the second elastic modulus, and the film is intact in the chip mounting area.
-
公开(公告)号：US12230576B2
公开(公告)日：2025-02-18
申请号：US17579635
申请日：2022-01-20
Applicant: Samsung Electronics Co., Ltd.
Inventor： Jaemin Jung , Jeongkyu Ha , Sanguk Han
IPC: H01L23/538 , H01L25/18 , H05K1/18 , H01L23/00 , H01L23/373
Abstract: A chip on film (COF) package includes a base film having an upper surface and a lower surface opposite to each other, a bridge film having an edge that overlaps the base film, and an upper surface and a lower surface opposite to each other, a display driver integrated circuit (IC) mounted on the upper surface of the base film, and a heat dissipation member arranged in correspondence with the display driver IC on the lower surface of the base film. The upper surface of the base film and the lower surface of the bridge film adhere to each other in their respective long axis directions, and a long axis length of the bridge film is greater than a long axis length of the base film.
-
Patent Agency Ranking
公开(公告)号：US20240321902A1
公开(公告)日：2024-09-26
申请号：US18612828
申请日：2024-03-21
Applicant: Samsung Electronics Co., Ltd.
Inventor： Narae Shin , Jeongkyu Ha , Woonbae Kim , Yechung Chung , Jaemin Jung
IPC: H01L27/12
CPC classification number: H01L27/124
Abstract: A chip of film package comprises a film substrate having a chip mounting region, an inner lead bonding region arranged within the chip mounting region, and an outer lead bonding region spaced apart from the inner lead bonding region in a first direction, and providing upper and lower surfaces opposite to each other, a first upper wiring pattern arranged on the upper surface of the film substrate and extending in the first direction from the inner lead bonding region to the outer lead bonding region, a second upper wiring pattern spaced apart from the first upper wiring pattern in the first direction, an upper solder resist layer covering an upper surface of the first upper wiring pattern; and a lower solder resist layer covering an upper surface of the lower wiring pattern.
-
公开(公告)号：US20250022998A1
公开(公告)日：2025-01-16
申请号：US18583947
申请日：2024-02-22
Applicant: Samsung Electronics Co., Ltd.
Inventor： Seunghyun Cho , Jaemin Jung , Jeongkyu Ha
IPC: H01L33/62 , H01L25/075 , H01L25/16 , H01L33/48
Abstract: A film package includes a film substrate, vias penetrating through the film substrate, interconnection patterns on the film substrate, and a semiconductor chip electrically connected to at least one of the interconnection patterns and to the vias, wherein the interconnection patterns include input patterns, first output patterns, and second output patterns, the film package includes input pads on a surface of the film substrate, and the input patterns extend from the input pads, the film package includes first output pads positioned toward a first edge of the film substrate on a first surface of the film substrate, and the first output patterns extend from the first output pads, and the film package includes second output pads positioned toward a second edge of the film substrate on a second surface of the film substrate opposite to the first surface, and the second output patterns extend from the second output pads.
-
公开(公告)号：US20240204009A1
公开(公告)日：2024-06-20
申请号：US18237013
申请日：2023-08-23
Applicant: Samsung Electronics Co., Ltd.
Inventor： Seunghyun Cho , Jaemin Jung , Jeongkyu Ha
IPC: H01L27/12
CPC classification number: H01L27/1244
Abstract: A film package includes: a film substrate having a first side surface and a second side surface opposing each other in a first direction, each of the first side surface and the second side surface extending in a second direction perpendicular to the first direction; at least one semiconductor chip disposed on the film substrate and extending lengthwise in the first direction; input terminals arranged on the film substrate along the first side surface, output terminals arranged on the film substrate along the second side surface, and wirings formed on the film substrate and electrically connecting the input terminals and the output terminals to the at least one semiconductor chip; and a protective layer covering the wirings on the film substrate.
-
公开(公告)号：US20240096909A1
公开(公告)日：2024-03-21
申请号：US18200609
申请日：2023-05-23
Applicant: Samsung Electronics Co., Ltd.
Inventor： Seunghyun Cho , Jaemin Jung , Jeongkyu Ha
CPC classification number: H01L27/1244 , H05K7/20954
Abstract: A chip on film (COF) package includes a film substrate including a base film having a mounting region, a main line pattern extending on the base film, and a branch line pattern extending on the base film and electrically connected to the main line pattern, a semiconductor chip vertically overlapping the mounting region, a first bump structure disposed between the semiconductor chip and the film substrate and electrically connected to the main line pattern, and a second bump structure disposed between the semiconductor chip and the film substrate and electrically connected to the branch line pattern, the branch line pattern extends so as not to overlap a first edge of the first bump structure facing a first edge of the mounting region and a first edge of the second bump structure facing the first edge of the mounting region.
-
公开(公告)号：US20230036519A1
公开(公告)日：2023-02-02
申请号：US17679587
申请日：2022-02-24
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Sanguk HAN , Jaemin Jung , Jeongkyu Ha , Kwanjai Lee
IPC: G09G3/20
Abstract: A chip on film package is provided. The chip on film package includes a film substrate with a base film, a conductive pad extending in a first direction on the base film, and a conductive line pattern extending from the conductive pad; a semiconductor chip provided on the film substrate; and a bump structure provided between the semiconductor chip and the conductive pad. A first peripheral wall and a second peripheral wall of the bump structure extend in the first direction and define a trench, a portion of the conductive pad is provided in the trench, and the conductive pad is spaced apart from at least one of the first peripheral wall and the second peripheral wall.
-
-
-
-
-
-
-
-
-
Search Results
11
records
(took 0.016 seconds)
