-
公开(公告)号：US09983604B2
公开(公告)日：2018-05-29
申请号：US14874758
申请日：2015-10-05
Inventor： JaeYoul Lee , Jeongpyo Kim , Yong Sin Kim , Seong Jin Yun
CPC classification number: G05F1/575 , G09G3/3696 , G09G2330/021
Abstract: A low drop-out (LDO) regulator includes a pass transistor, a feedback circuit, an error amplifier, and a compensation unit. The pass transistor is configured to regulate a power supply and output an output voltage according to a control signal. The feedback circuit is configured to generate a feedback voltage based on the output voltage. The error amplifier is configured to output a comparison signal in response to a reference voltage and the feedback voltage. The compensation circuit is configured to generate a negative capacitance in association with a first node connected to a gate electrode of the pass transistor.
-
公开(公告)号：US20180330654A1
公开(公告)日：2018-11-15
申请号：US15869835
申请日：2018-01-12
Applicant: Samsung Electronics Co, Ltd.
Inventor： Young-Bae MOON , Jeongpyo Kim , Kiho Kong , Jeehwal Kim
IPC: G09G3/20 , G09G3/3266 , G09G3/3275 , G09G3/3258
Abstract: In one embodiment, the control integrated circuit includes a gate driver configured to selectively drive a plurality of gate lines associated with pixels in a display panel; a source driver configured to supply data to the display panel; and a controller configured to generate switch control signals for controlling a switch driver of the display panel, the switch driver for selectively supplying the data to a plurality of data lines. The controller is configured to control the gate driver and generate the switch control signals such that the plurality of gate lines are activated non-sequentially, and an order of pixels activated and associated with a same one of the plurality of data lines includes at least two pixels of a same color activated in sequence.
-
公开(公告)号：US12032399B2
公开(公告)日：2024-07-09
申请号：US17721541
申请日：2022-04-15
Applicant: Samsung Electronics Co., Ltd.
Inventor： Jungmoon Kim , Jeongpyo Kim , Insuk Kim , Yeonjeong Lee
CPC classification number: G05F1/575 , G09G3/20 , G09G2330/021
Abstract: An integrated circuit includes: a power supply circuit configured to generate a supply voltage from at least one of first and second power source voltages; and a system load configured to operate by receiving the supply voltage through an output node of the power supply circuit, wherein the power supply circuit includes: a first low drop-output (LDO) regulator configured to generate, from the first power source voltage, a first load current flowing to the system load through the output node; and a second LDO regulator configured to selectively generate a second load current flowing to the system load through the output node, from the second power source voltage based on a difference between voltages of internal nodes of the first LDO regulator.
-
公开(公告)号：US10777114B2
公开(公告)日：2020-09-15
申请号：US15869835
申请日：2018-01-12
Applicant: Samsung Electronics Co., Ltd.
Inventor： Young-Bae Moon , Jeongpyo Kim , Kiho Kong , Jeehwal Kim
IPC: G09G3/20 , G09G3/3266 , G09G3/3275 , G09G3/3258 , H01L27/32
Abstract: In one embodiment, the control integrated circuit includes a gate driver configured to selectively drive a plurality of gate lines associated with pixels in a display panel; a source driver configured to supply data to the display panel; and a controller configured to generate switch control signals for controlling a switch driver of the display panel, the switch driver for selectively supplying the data to a plurality of data lines. The controller is configured to control the gate driver and generate the switch control signals such that the plurality of gate lines are activated non-sequentially, and an order of pixels activated and associated with a same one of the plurality of data lines includes at least two pixels of a same color activated in sequence.
-
-
-
Search Results
4
records
(took 0.013 seconds)
