Gamma amplifier including track period, and gamma voltage generator having the same

    公开(公告)号:US11688320B2

    公开(公告)日:2023-06-27

    申请号:US17704595

    申请日:2022-03-25

    Abstract: Disclosed is a gamma amplifier which includes a first amplification device that receives a first input signal during a first track period in a first time period, compensates for a first offset voltage from the first input signal during a first compensation period in the first time period, and generates a first output signal during a second time period after the first time period based on a control signal, and a second amplification device that receives a second input signal during a second track period in the second time period, compensates for a second offset voltage from the second input signal during a second compensation period in the second time period, and generates a second output signal during a third time period after the second time period based on the control signal and processing circuitry configured to generate the control signal.

    DISPLAY DRIVER CIRCUIT AND DEFECT TESTING METHOD

    公开(公告)号:US20250124835A1

    公开(公告)日:2025-04-17

    申请号:US18742820

    申请日:2024-06-13

    Abstract: An example display driving integrated circuit includes a gamma voltage generator, a source driver, gamma lines, a first transistor, and a second transistor. The gamma voltage generator generates gamma voltages. The source driver generates data signals based on the gamma voltages. The gamma lines connect the gamma voltage generator with the source driver, and transmit the gamma voltages. The first transistor and the second transistor connect to a first end and a second end of a first gamma line of the gamma lines. The first transistor includes a first gate for receiving a first signal. The second transistor includes a second gate for receiving a second signal. The first signal and the second signal are complementary to each other.

    Integrated circuit and electronic device including the same

    公开(公告)号:US12032399B2

    公开(公告)日:2024-07-09

    申请号:US17721541

    申请日:2022-04-15

    CPC classification number: G05F1/575 G09G3/20 G09G2330/021

    Abstract: An integrated circuit includes: a power supply circuit configured to generate a supply voltage from at least one of first and second power source voltages; and a system load configured to operate by receiving the supply voltage through an output node of the power supply circuit, wherein the power supply circuit includes: a first low drop-output (LDO) regulator configured to generate, from the first power source voltage, a first load current flowing to the system load through the output node; and a second LDO regulator configured to selectively generate a second load current flowing to the system load through the output node, from the second power source voltage based on a difference between voltages of internal nodes of the first LDO regulator.

Patent Agency Ranking