公开(公告)号：US10832983B2

公开(公告)日：2020-11-10

申请号：US15673248

申请日：2017-08-09

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Ji Min Choi ,  Dong Ryul Lee ,  Ho Ouk Lee ,  Ji Young Kim ,  Chang Hyun Cho

IPC: H01L21/762 ,  H01L23/14 ,  H01L27/108

Abstract: A semiconductor device includes a substrate having a semiconductor layer. A trench is formed within the semiconductor layer. A filling insulating film is disposed within the trench. An insertion liner is disposed within the filling insulating film. The insertion liner is spaced apart from the semiconductor layer and extends along the bottom surface of the trench.

公开(公告)号：US20240379622A1

公开(公告)日：2024-11-14

申请号：US18531140

申请日：2023-12-06

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sung Yun WOO ,  Ji Min Choi ,  Joong Won Shin ,  Yeon Jin Lee ,  Jong Min Lee

IPC: H01L25/065 ,  H01L23/00 ,  H01L23/31 ,  H01L23/48

Abstract: A semiconductor package includes a base chip including a top surface extending in a first horizontal direction and a second horizontal direction intersecting the first horizontal direction, a semiconductor chip stack including a first semiconductor chip and a second semiconductor chip which are sequentially stacked on the base chip in a vertical direction and are aligned on respective sides in the vertical direction, first through vias penetrating the base chip and spaced apart from each other in the first horizontal direction, second through vias penetrating the first semiconductor chip and spaced apart from each other in the first horizontal direction, third through vias penetrating the second semiconductor chip and spaced apart from each other in the first horizontal direction, first connection pads contacting the first through vias, second connection pads contacting the second through vias, and third connection pads contacting the third through vias.

公开(公告)号：US10204825B2

公开(公告)日：2019-02-12

申请号：US15667118

申请日：2017-08-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Dong Ryul Lee ,  Joong Chan Shin ,  Dong Jun Lee ,  Ho Ouk Lee ,  Ji Min Choi ,  Ji Young Kim ,  Chan Sic Yoon ,  Chang Hyun Cho

IPC: H01L21/3205 ,  H01L21/764 ,  H01L21/768 ,  H01L29/06 ,  H01L29/49 ,  H01L23/522

Abstract: A method for fabricating a semiconductor device includes providing a substrate including a cell region including a bit line structure, a bit line spacer and a lower electrode and a peripheral circuit region including first to third impurity regions, forming an interlayer insulating film on the peripheral circuit region, forming a first metal layer on the interlayer insulating film, forming a first trench and a second trench in the first metal layer between the first and second impurity regions, the second trench is disposed between the second and third impurity regions and exposes the interlayer insulating film, forming a first capping pattern on the first trench to form an air gap in the first trench, filling the second trench with a first insulating material, and forming, on the first metal layer, a contact connected to the third impurity region.

公开(公告)号：US20180166352A1

公开(公告)日：2018-06-14

申请号：US15673248

申请日：2017-08-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ji Min Choi ,  Dong Ryul Lee ,  Ho Ouk Lee ,  Ji Young Kim ,  Chang Hyun Cho

IPC: H01L23/14 ,  H01L21/762

CPC classification number: H01L23/147 ,  H01L21/76205 ,  H01L21/76227 ,  H01L21/76229 ,  H01L27/10894

Abstract: A semiconductor device includes a substrate having a semiconductor layer. A trench is formed within the semiconductor layer. A filling insulating film is disposed within the trench. An insertion liner is disposed within the filling insulating film. The insertion liner is spaced apart from the semiconductor layer and extends along the bottom surface of the trench.