公开(公告)号：US20190295671A1

公开(公告)日：2019-09-26

申请号：US16157579

申请日：2018-10-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jin Bae BANG ,  Joon Suc JANG

IPC: G11C16/34 ,  G11C16/26 ,  G11C11/56

Abstract: A memory device includes a page buffer unit including a plurality of latches latching each of a plurality of pieces of dummy data of selected memory cells according to a plurality of dummy signals provided by a word line of the selected memory cells, and a control logic comparing a count value of a first count latch among the plurality of latches with a reference count value, determining whether to count a second count latch other than the first count latch according to a result of the comparison, and correcting a level of a read signal provided by the word line of the selected memory cells in a read operation.