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公开(公告)号:US20250081445A1
公开(公告)日:2025-03-06
申请号:US18660803
申请日:2024-05-10
Applicant: Samsung Electronics Co., Ltd.
Inventor: Bo Won Yoo , Seok Han Park , Keun Ui Kim , Yu Jin Kim , Joong Chan Shin , Gyu Hwan Oh , Eun Suk Jang , Jin Woo Han
IPC: H10B12/00
Abstract: A semiconductor memory device includes a bit line extending in a first direction on a substrate, an active pattern on the bit line, a word line on a first sidewall of the active pattern and extending in a second direction, a back gate electrode on a second sidewall of the active pattern and extending in the second direction, a gate isolation pattern on the first sidewall of the active pattern and including a low-k pattern extending in the second direction, and a data storage pattern connected to the second surface of the active pattern. The word line is between the active pattern and the gate isolation pattern, and a vertical distance between the bit line and the word line is greater than a vertical distance between the bit line and the low-k pattern.
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公开(公告)号:US10204825B2
公开(公告)日:2019-02-12
申请号:US15667118
申请日:2017-08-02
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Dong Ryul Lee , Joong Chan Shin , Dong Jun Lee , Ho Ouk Lee , Ji Min Choi , Ji Young Kim , Chan Sic Yoon , Chang Hyun Cho
IPC: H01L21/3205 , H01L21/764 , H01L21/768 , H01L29/06 , H01L29/49 , H01L23/522
Abstract: A method for fabricating a semiconductor device includes providing a substrate including a cell region including a bit line structure, a bit line spacer and a lower electrode and a peripheral circuit region including first to third impurity regions, forming an interlayer insulating film on the peripheral circuit region, forming a first metal layer on the interlayer insulating film, forming a first trench and a second trench in the first metal layer between the first and second impurity regions, the second trench is disposed between the second and third impurity regions and exposes the interlayer insulating film, forming a first capping pattern on the first trench to form an air gap in the first trench, filling the second trench with a first insulating material, and forming, on the first metal layer, a contact connected to the third impurity region.
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