公开(公告)号：US20230335209A1

公开(公告)日：2023-10-19

申请号：US17949000

申请日：2022-09-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： Youngsan Kang ,  Donghee Kim ,  Jungho Jung ,  Jun-Ho Jo

IPC: G11C29/36 ,  G11C29/12

CPC classification number: G11C29/36 ,  G11C29/12015 ,  G11C29/1201

Abstract: A semiconductor memory device includes: a memory core including memory cells and configured to output core data stored in the memory cells in response to a read request, a command decoder configured to decode at least one command input from an external device, a command log register configured to sequentially store the at least one command in response to a register enable signal and output the at least one command as a command log in response to a command log read signal, and a mode register set configured to generate the register enable signal or the command log read signal in response to a mode register set command transmitted to the command decoder.

公开(公告)号：US11870570B2

公开(公告)日：2024-01-09

申请号：US17581876

申请日：2022-01-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Young San Kang ,  Byoung Sul Kim ,  Soo-Hyung Kim ,  Jun-Ho Jo

IPC: H04L1/00 ,  G11C7/22 ,  H04L1/16 ,  G11C7/14 ,  H04L1/1607

CPC classification number: H04L1/0042 ,  G11C7/14 ,  G11C7/22 ,  H04L1/0045 ,  H04L1/1678

Abstract: A signal receiving device includes a sampling device configured to sample an input signal to output a plurality of sampling values, and an output circuit configured to output data based on the sampling values. The output circuit outputs the data by performing majority voting based on first to third sampling values of the sampling values in response to a first control signal, and outputs the data and first and second error count signals based on the first sampling value and fourth and fifth sampling values of the sampling values in response to a second control signal. The first error count signal is generated by comparing the first sampling value sampled under a reference condition with the fourth sampling value sampled under a first offset condition, and the second error count signal is generated by comparing the first sampling value with the fifth sampling value sampled under a second offset condition.

公开(公告)号：US12170121B2

公开(公告)日：2024-12-17

申请号：US17949000

申请日：2022-09-20

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Youngsan Kang ,  Donghee Kim ,  Jungho Jung ,  Jun-Ho Jo

IPC: G11C29/00 ,  G11C29/12 ,  G11C29/36

Abstract: A semiconductor memory device includes: a memory core including memory cells and configured to output core data stored in the memory cells in response to a read request, a command decoder configured to decode at least one command input from an external device, a command log register configured to sequentially store the at least one command in response to a register enable signal and output the at least one command as a command log in response to a command log read signal, and a mode register set configured to generate the register enable signal or the command log read signal in response to a mode register set command transmitted to the command decoder.