公开(公告)号：US20220336421A1

公开(公告)日：2022-10-20

申请号：US17582387

申请日：2022-01-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seungyoon KIM ,  Junghoon JUN ,  Sanghun CHUN ,  Jeehoon HAN

IPC: H01L25/065 ,  H01L25/18 ,  H01L23/00

Abstract: A semiconductor memory device including a substrate, first pad layers and a second pad layer on the substrate, a pattern structure including first openings on the first pad layers and a second opening on the second pad layer, and having first and second regions, gate electrodes on the pattern structure and each including a pad region, channel structures penetrating through the gate electrodes in the first region, gate contact plugs electrically connected to the gate electrodes through the pad region of each of the gate electrodes and extending in a vertical direction to penetrate the first openings and connected to the first pad layers, a source contact plug, extending in the vertical direction penetrating the second opening and connected to the second pad layer, and a source connection patter under the pattern structure and in contact with the source contact plug and the second pad layer may be provided.