公开(公告)号：US20250063765A1

公开(公告)日：2025-02-20

申请号：US18938867

申请日：2024-11-06

Applicant: Samsung Electronics Co, Ltd.

Inventor： Jeonghyuk Yim ,  Byounghak Hong ,  Jungsu Kim ,  Kang-ill Seo

IPC: H01L29/423 ,  H01L29/06 ,  H01L29/66 ,  H01L29/786

Abstract: Nanosheet transistor devices are provided. A nanosheet transistor device includes a transistor stack that includes a lower nanosheet transistor having a first nanosheet width and a lower gate width. The transistor stack also includes an upper nanosheet transistor that is on the lower nanosheet transistor and that has a second nanosheet width and an upper gate width that are different from the first nanosheet width and the lower gate width, respectively. Related methods of forming a nanosheet transistor device are also provided.

公开(公告)号：US12170322B2

公开(公告)日：2024-12-17

申请号：US17504720

申请日：2021-10-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jeonghyuk Yim ,  Byounghak Hong ,  Jungsu Kim ,  Kang-ill Seo

IPC: H01L29/423 ,  H01L29/06 ,  H01L29/66 ,  H01L29/786

Abstract: Nanosheet transistor devices are provided. A nanosheet transistor device includes a transistor stack that includes a lower nanosheet transistor having a first nanosheet width and a lower gate width. The transistor stack also includes an upper nanosheet transistor that is on the lower nanosheet transistor and that has a second nanosheet width and an upper gate width that are different from the first nanosheet width and the lower gate width, respectively. Related methods of forming a nanosheet transistor device are also provided.

公开(公告)号：US20220367658A1

公开(公告)日：2022-11-17

申请号：US17504720

申请日：2021-10-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jeonghyuk Yim ,  Byounghak Hong ,  Jungsu Kim ,  Kang-ill Seo

IPC: H01L29/423 ,  H01L29/06 ,  H01L29/66 ,  H01L29/786

Abstract: Nanosheet transistor devices are provided. A nanosheet transistor device includes a transistor stack that includes a lower nanosheet transistor having a first nanosheet width and a lower gate width. The transistor stack also includes an upper nanosheet transistor that is on the lower nanosheet transistor and that has a second nanosheet width and an upper gate width that are different from the first nanosheet width and the lower gate width, respectively. Related methods of forming a nanosheet transistor device are also provided.