公开(公告)号：US20240218297A1

公开(公告)日：2024-07-04

申请号：US18244336

申请日：2023-09-11

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： DAESUNG CHUNG ,  HAYOUNG JEON ,  JI HOON CHA ,  MINGYU JAE ,  KYUNGHYUN KIM ,  SUNGHOON YOO

IPC: C11D3/37 ,  C11D3/20 ,  C11D3/43 ,  C11D11/00

CPC classification number: C11D3/3746 ,  C11D3/2082 ,  C11D3/43 ,  C11D11/0047

Abstract: A semiconductor cleaning composition includes: a hydrophobic polymer, an organic acid; and a solvent, wherein the hydrophobic polymer includes a first allotrope and a second allotrope, wherein the first allotrope is nonpolar, wherein the second allotrope is polar, and wherein the second allotrope is about 5% to about 20% of the hydrophobic polymer.

公开(公告)号：US20210091104A1

公开(公告)日：2021-03-25

申请号：US16874159

申请日：2020-05-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： SANGHOON JEONG ,  SANGJUN HONG ,  SUNIL SHIM ,  KYUNGHYUN KIM ,  CHANGSUP MUN

IPC: H01L27/11556 ,  H01L27/11582 ,  G11C5/02

Abstract: A semiconductor memory device includes a stack structure comprising horizontal electrodes sequentially stacked on a substrate including a cell array region and an extension region and horizontal insulating layers between the horizontal electrodes. The semiconductor memory device may further include vertical structures that penetrate the stack structure, a first one of the vertical structures being on the cell array region and a second one of the vertical structures being on the extension region. Each of the vertical structures includes a channel layer, and a tunneling insulating layer, a charge storage layer and a blocking insulating layer which are sequentially stacked on a sidewall of the channel layer. The charge storage layer of the first vertical structure includes charge storage patterns spaced apart from each other in a direction perpendicular to a top surface of the substrate with the horizontal insulating layers interposed therebetween. The charge storage layer of the second vertical structure extends along sidewalls of the horizontal electrodes and sidewalls of the horizontal insulating layers.

公开(公告)号：US20140011350A1

公开(公告)日：2014-01-09

申请号：US13937401

申请日：2013-07-09

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： CHOONGKEE SEONG ,  KYUNGHYUN KIM ,  KIJONG PARK ,  JIN-I LEE

IPC: H01L29/423

CPC classification number: H01L29/42328

Abstract: A method of manufacturing a semiconductor device, the method including forming a first gate electrode layer including a semiconductor material on a substrate; performing an annealing process on the first gate electrode layer; performing a dry cleaning process on a surface of the first gate electrode layer after the annealing process; and forming a second gate electrode layer on the first gate electrode layer after the dry cleaning process.

Abstract translation: 一种制造半导体器件的方法，所述方法包括在衬底上形成包括半导体材料的第一栅电极层; 对所述第一栅电极层进行退火处理; 在退火处理之后在第一栅电极层的表面上进行干洗处理; 以及在所述干式清洗处理之后，在所述第一栅极电极层上形成第二栅极电极层。