公开(公告)号：US20240334681A1

公开(公告)日：2024-10-03

申请号：US18501120

申请日：2023-11-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： MYUNGHUN JUNG ,  KYUWON WOO ,  DONGHWA SHIN ,  SUNG-JIN YEO ,  HO-IN RYU

IPC: H10B12/00

CPC classification number: H10B12/482 ,  H10B12/315 ,  H10B12/485 ,  H10B12/50

Abstract: A semiconductor device includes a substrate including a cell block region and a peripheral region adjacent to each other in a first direction, first and second active patterns adjacent to each other in a second direction that is different from the first direction on the cell block region, a first bit line extending in the first direction on the first active pattern, a second bit line extending in the first direction on the second active pattern, a bit line connector connecting the first bit line and the second bit line to each other and adjacent to the peripheral region, an inner spacer on an inner surface of the bit line connector, and an outer spacer on an outer surface of the bit line connector. The inner spacer extends on (e.g., covers) the inner surface of the bit line connector and extends onto (e.g., continuously extends onto) inner surfaces of the first bit line and the second bit line.