公开(公告)号：US20170148914A1

公开(公告)日：2017-05-25

申请号：US15348586

申请日：2016-11-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yongseok LEE ,  Jeongyun LEE ,  Gigwan PARK ,  Keo Myoung SHIN ,  Hyunji KIM ,  Sangduk PARK

IPC: H01L29/78 ,  H01L29/66 ,  H01L27/092 ,  H01L29/06 ,  H01L29/423

CPC classification number: H01L29/7843 ,  H01L21/823814 ,  H01L21/823821 ,  H01L27/092 ,  H01L27/0924 ,  H01L28/00 ,  H01L29/0649 ,  H01L29/165 ,  H01L29/42372 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/7848

Abstract: A semiconductor device includes an active pattern having sidewalls defined by a device isolation pattern disposed on a substrate and an upper portion protruding from a top surface of the device isolation pattern, a liner insulating layer on the sidewalls of the active pattern, a gate structure on the active pattern, and source/drain regions at both sides of the gate structure. The liner insulating layer includes a first liner insulating layer and a second liner insulating layer having a top surface higher than a top surface of the first liner insulating layer. Each of the source/drain regions includes a first portion defined by the second liner insulating layer, and a second portion protruding upward from the second liner insulating layer and covering the top surface of the first liner insulating layer.