Abstract:
A method of training a memory device is provided. In first to third DCA training steps, a score for each of first to third DCA code combinations is calculated based on an eye window size of a data signal, and in response to a tie occurring among scores, a DCA code combination is selected based on the sum of an even-eye window minimum value and an odd-eye window minimum value of the data signal.
Abstract:
A training method of a memory device adjusting an eye window of a data signal in response to a duty cycle adjuster (DCA) includes performing a first training operation that selects a first DCA code corresponding to a first internal clock signal having a phase difference of 180° relative to a reference internal clock signal, and performing a second training operation that selects a second DCA code and a third DCA code respectively corresponding to a second internal clock signal and a third internal clock signal having a phase difference of 90° and 270° relative to reference internal clock signal. In the first training operation, the eye window size of the data signal is measured in units of two unit intervals, and in the second training operation, the eye window size of the data signal is measured in units of one unit interval.
Abstract:
Provided is a method for repairing one or more defective memory cells of a semiconductor memory device by a system management interrupt and a basic input/output system service routine. In the method, when an error has occurred in data read from the semiconductor memory device, the system management interrupt is generated to invoke the basic input/output system service routine. During execution of the basic input/output system service routine, a repair task is performed to one or more defective memory cells causing a read error in the semiconductor memory device using spare memory cells.