SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR PACKAGE

    公开(公告)号:US20220130786A1

    公开(公告)日:2022-04-28

    申请号:US17342902

    申请日:2021-06-09

    Abstract: A semiconductor package including a core substrate, a semiconductor chip in the core substrate and having chip pads, a redistribution wiring layer covering a lower surface of the core substrate and including redistribution wirings electrically connected to the chip pads and a pair of capacitor pads exposed from an outer surface of the redistribution wiring layer, conductive pastes on the capacitor pads, respectively, and a capacitor via the conductive pastes and having first and second outer electrodes on the capacitor pads, respectively, may be provided. Each of the capacitor pads includes a pad pattern exposed from the outer surface of the redistribution wiring layer, and at least one via pattern at a lower portion of the pad pattern and electrically connected to at least one of the redistribution wirings. The via pattern is eccentric by a distance from a center line of the pad pattern.

    SEMICONDUCTOR PACKAGES
    2.
    发明申请

    公开(公告)号:US20250149515A1

    公开(公告)日:2025-05-08

    申请号:US18673864

    申请日:2024-05-24

    Abstract: A semiconductor package, comprising: a semiconductor chip; a conductive bonding layer on the semiconductor chip; an upper insulating layer on the conductive bonding layer; an upper package on the upper insulating layer; a heat dissipation structure that includes upper heat dissipation patterns and upper heat dissipation vias, wherein the upper heat dissipation patterns are in the upper insulating layer, and the upper heat dissipation vias connect the conductive bonding layer and the upper heat dissipation patterns; and a heat dissipation member on at least one side of the upper package, wherein the heat dissipation member is connected to the upper heat dissipation patterns.

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