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公开(公告)号:US20240291663A1
公开(公告)日:2024-08-29
申请号:US18582191
申请日:2024-02-20
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jungkon KIM , Wonsuk JANG , Jinsu KIM , Jongmin CHOI , Minho KIM , Juwoan YOO , Moonsoo CHANG , Inmyung CHOI
CPC classification number: H04L9/3231 , G06V40/168 , G06V40/172 , H04L9/3236
Abstract: An electronic device encrypting biometric information includes memory for storing instructions and a processor. The instructions may be configured to, when executed by the processor, cause the electronic device to obtain a transformation matrix that maps a first feature value related to first biometric information to a first codeword, generate a third feature value by applying the transformation matrix to a second feature value related to second biometric information, compare a cosine similarity between a second codeword most similar to the third feature value and the third feature value with a threshold, map the second feature value to the second codeword based on the cosine similarity being greater than the threshold, and generate a hashed second codeword based on the second codeword, and transmit or store the hashed second codeword.
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公开(公告)号:US20220182226A1
公开(公告)日:2022-06-09
申请号:US17572827
申请日:2022-01-11
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sangwan KWON , Taeho KGIL , Jinsu KIM
IPC: H04L9/08
Abstract: A technique, performed by an electronic device, of managing a security key is provided. The electronic device may receive security information from each of at least one other electronic device, determine a master electronic device based on a security level of the electronic device and a security level of a security level of the at least one other electronic device, the security level of the at least one other electronic device being included in the received security information, generate a security key as the electronic device is determined as the master electronic device, and determine a portion to be removed from the security key for each security level of a plurality of electronic devices including the electronic device and the at least one other electronic device, and provide each partial security key from which the determined portion is omitted, to the at least one other electronic device.
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公开(公告)号:US20210193555A1
公开(公告)日:2021-06-24
申请号:US17029334
申请日:2020-09-23
Applicant: Samsung Electronics Co., Ltd.
Inventor: Seonho LEE , Jinsu KIM , Junwoo MYUNG , Yongjin PARK , Jaekul LEE
IPC: H01L23/373 , H01L23/31 , H01L23/053 , H01L23/498
Abstract: A semiconductor device including a semiconductor chip having a first surface and a second surface opposite to the first surface, a first heat dissipation member on the second surface of the semiconductor chip, the first heat dissipation member having a vertical thermal conductivity in a direction perpendicular to the second surface, and a horizontal thermal conductivity in a direction parallel to the second surface, the first vertical thermal conductivity being smaller than the first horizontal thermal conductivity, and a second heat dissipation member comprising a vertical pattern penetrating the first heat dissipation member, the second heat dissipation member having a vertical thermal conductivity that is greater than the vertical thermal conductivity of the first heat dissipation member may be provided.
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公开(公告)号:US20230119170A1
公开(公告)日:2023-04-20
申请号:US18084994
申请日:2022-12-20
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Youngsun LEE , Dohyeon KIM , Byeongkeol KIM , Jinsu KIM , Seokjoon PARK , Jungje BANG , Hoyeon SEO , Jongbum LEE , Jongmin JEON
Abstract: An electronic device including a thermosetting bonding sheet may include: a base substrate including a base substrate body and a plurality of base pads disposed on the base substrate body, a connection substrate including a connection substrate body facing the base substrate body, a plurality of connection pads disposed on the connection substrate body and including a pad hole, and a plurality of connection lines disposed on the connection substrate body and connected to the plurality of connection pads, a solder, at least a portion of which is inserted into the pad hole, disposed on the base pad and configured to electrically connect the base pad to the connection pad, and a thermosetting bonding sheet provided between the base substrate body and the connection substrate body, bonded to the base substrate body and the connection substrate body, and enclosing the solder
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公开(公告)号:US20220230426A1
公开(公告)日:2022-07-21
申请号:US17573835
申请日:2022-01-12
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Jungkon KIM , Jinsu KIM , Junbum SHIN
Abstract: Provided is a method for an electronic device to perform inference based on encrypted data received from an external device, using an artificial intelligence (AI) model, the method including: transforming the AI model to perform inference based on encrypted data, generating parameter information including information about at least one parameter for encrypting data to be input to the AI model, based on the transformed AI model, transmitting the parameter information to the external device, receiving, from the external device, data encrypted based on the parameter information, and obtaining an inference result output from the transformed AI model by inputting the encrypted data to the transformed AI model.
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公开(公告)号:US20220130786A1
公开(公告)日:2022-04-28
申请号:US17342902
申请日:2021-06-09
Applicant: Samsung Electronics Co., Ltd.
Inventor: Gyoyoung JUNG , Jinsu KIM , Hyunsuk YANG , Kiju LEE , Hoyeon JO , Ikkyu JIN
IPC: H01L23/00
Abstract: A semiconductor package including a core substrate, a semiconductor chip in the core substrate and having chip pads, a redistribution wiring layer covering a lower surface of the core substrate and including redistribution wirings electrically connected to the chip pads and a pair of capacitor pads exposed from an outer surface of the redistribution wiring layer, conductive pastes on the capacitor pads, respectively, and a capacitor via the conductive pastes and having first and second outer electrodes on the capacitor pads, respectively, may be provided. Each of the capacitor pads includes a pad pattern exposed from the outer surface of the redistribution wiring layer, and at least one via pattern at a lower portion of the pad pattern and electrically connected to at least one of the redistribution wirings. The via pattern is eccentric by a distance from a center line of the pad pattern.
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公开(公告)号:US20230268248A1
公开(公告)日:2023-08-24
申请号:US18310284
申请日:2023-05-01
Applicant: Samsung Electronics Co., Ltd.
Inventor: Seonho LEE , Jinsu KIM , Junwoo MYUNG , Yongjin PARK , Jaekul LEE
IPC: H01L23/373 , H01L23/498 , H01L23/053 , H01L23/31
CPC classification number: H01L23/3735 , H01L23/49822 , H01L23/053 , H01L23/3128
Abstract: A semiconductor device including a semiconductor chip having a first surface and a second surface opposite to the first surface, a first heat dissipation member on the second surface of the semiconductor chip, the first heat dissipation member having a vertical thermal conductivity in a direction perpendicular to the second surface, and a horizontal thermal conductivity in a direction parallel to the second surface, the first vertical thermal conductivity being smaller than the first horizontal thermal conductivity, and a second heat dissipation member comprising a vertical pattern penetrating the first heat dissipation member, the second heat dissipation member having a vertical thermal conductivity that is greater than the vertical thermal conductivity of the first heat dissipation member may be provided.
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公开(公告)号:US20230171535A1
公开(公告)日:2023-06-01
申请号:US18101271
申请日:2023-01-25
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Kibum KIM , Jinsu KIM , Seokjoon PARK , Hakjoon KIM
CPC classification number: H04R1/2826 , H05K9/0024 , H04R3/00 , H04R1/025 , H04R1/028 , H04R2400/11 , H04R2499/11 , H04M1/0277
Abstract: The electronic device may include: a housing; a printed circuit board (PCB) disposed in the housing, the PCB including a first board surface facing a first direction and a second board surface opposite to the first board surface, and having an opening penetrating through a surface thereof, a sound module disposed in the opening so that a front thereof faces the first direction, and electrically connected to the PCB to generate a sound, a shield can connected to the second board surface to cover the opening, in a state in which the second board surface is viewed, and a frame disposed to face the first board surface.
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公开(公告)号:US20240290399A1
公开(公告)日:2024-08-29
申请号:US18495210
申请日:2023-10-26
Applicant: Samsung Electronics Co., Ltd.
Inventor: Byungsoo KIM , Jinsu KIM , Hyunggon KIM
CPC classification number: G11C16/3427 , G11C16/08 , G11C16/30
Abstract: A flash memory comprises a memory cell array having a plurality of memory cells; a read recovery voltage generator configured to provide a read recovery voltage to the plurality of memory cells; and a read recovery voltage controller configured to provide recovery control signals for controlling the read recovery voltage. The read recovery voltage generator includes a plurality of ground pass transistors that during a read recovery operation are configured to control a falling slope of an unselection recovery voltage provided to an unselected word line in response to the recovery control signals.
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公开(公告)号:US20220187880A1
公开(公告)日:2022-06-16
申请号:US17538086
申请日:2021-11-30
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jisang KIM , Jinsu KIM , Chunsoo LEE , Soonin JEONG , Jinchul CHOI
IPC: G06F1/18
Abstract: A communication device insertable into an external electronic device is provided. The communication device includes a converter circuit, a power line, a first conductor connected to the power line, and at least one second conductor electrically disconnected from the first conductor and connected to a ground, the first conductor being electrically connected to the at least one second conductor by fastening between the communication device and the external electronic device, a signal line, and a control circuit connected to the power line, the first conductor, and the signal line, wherein the control circuit is configured to receive a first signal from a processor of the external electronic device through the signal line, receive a second signal generated based on a discharging of a power flowing along the power line to the ground through the at least one second conductor when the first conductor is electrically connected to the at least one second conductor, and output, based on the first signal and the second signal, a control signal to the converter circuit for controlling the converter circuit.
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