公开(公告)号：US08988962B2

公开(公告)日：2015-03-24

申请号：US13749687

申请日：2013-01-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sang-Ho Shin ,  Jung-Bae Lee ,  Min-Jeung Cho

IPC: G11C7/00 ,  G11C11/402 ,  G11C11/406

CPC classification number: G11C11/402 ,  G11C11/40618

Abstract: A refresh circuit and a semiconductor memory device including the refresh circuit are disclosed. The refresh circuit includes a mode register, a refresh controller and a multiplexer circuit. The mode register generates a mode register signal having information relating to a memory bank on which a refresh operation is to be performed. The refresh controller generates a self-refresh active command and a self-refresh address based on a self-refresh command and an oscillation signal. The multiplexer circuit may include a plurality of multiplexers. Each of the multiplexers selects one of an active command and the self-refresh active command in response to bits of the mode register signal. Each of the multiplexers generates a row active signal based on the selected command, and selects one of an external address and the self-refresh address to generate a row address.

Abstract translation: 公开了一种刷新电路和包括刷新电路的半导体存储器件。 刷新电路包括模式寄存器，刷新控制器和多路复用器电路。 模式寄存器生成具有与要进行刷新操作的存储体有关的信息的模式寄存器信号。 刷新控制器基于自刷新命令和振荡信号产生自刷新活动命令和自刷新地址。 多路复用器电路可以包括多个多路复用器。 每个复用器响应于模式寄存器信号的位选择一个活动命令和自刷新活动命令。 每个多路复用器基于所选择的命令生成行活动信号，并且选择外部地址和自刷新地址之一以生成行地址。