公开(公告)号：US20150340250A1

公开(公告)日：2015-11-26

申请号：US14562010

申请日：2014-12-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Mong-Sup LEE ,  Dong-Gyun HAN ,  Jong-Hyuk PARK

IPC: H01L21/67

CPC classification number: H01L21/6708 ,  H01L21/67253

Abstract: A wet etching nozzle, semiconductor manufacturing equipment including the same, and a wet etching method using the same are provided. The wet etching nozzle includes a first supply pipe configured to supply a first solution, for etching a partial area of an etched layer, to a substrate including the etched layer; a first suction pipe configured to suck the first solution from the substrate; a second supply pipe configured to supply a second solution for cleaning the partial area of the etched layer; and a second suction pipe configured to suck the second solution from the substrate.

Abstract translation: 提供了一种湿式蚀刻喷嘴，包括该蚀刻喷嘴的半导体制造设备和使用该蚀刻喷嘴的湿式蚀刻方法。 湿蚀刻喷嘴包括：第一供给管，被配置为向蚀刻层的基板供给用于蚀刻蚀刻层的局部区域的第一溶液; 第一吸入管，其构造成从所述基板吸入所述第一溶液; 第二供应管，被配置为提供用于清洁所述蚀刻层的部分区域的第二溶液; 以及构造成从所述基板吸取所述第二溶液的第二吸入管。

公开(公告)号：US20150171163A1

公开(公告)日：2015-06-18

申请号：US14481932

申请日：2014-09-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Mong-Sup LEE ,  Byoung-Yong GWAK ,  Byung-Ho KWAK ,  Yoon-Kyung KIM ,  Tae-Joon PARK ,  Byung-Sul RYU ,  In-Seak HWANG

IPC: H01L29/06

CPC classification number: H01L21/762 ,  H01L27/10855 ,  H01L27/10885 ,  H01L27/10888

Abstract: Provided are a semiconductor device and a method of fabricating the same. The semiconductor device includes a first bit line structure extending in a first direction, a second bit line structure extending in the first direction and spaced apart from the first bit line structure, a storage contact plug located between the first bit line structure and the second bit line structure, and extending in a second direction perpendicular to the first direction, a first plug insulator located between the first bit line structure and the second bit line structure, and configured to contact a side surface extending in the second direction of the storage contact plug, and a plug isolation pattern located between the first bit line structure and the first plug insulator.

Abstract translation: 提供半导体器件及其制造方法。 半导体器件包括沿第一方向延伸的第一位线结构，在第一方向上延伸并与第一位线结构间隔开的第二位线结构，位于第一位线结构和第二位之间的存储接触插塞 线结构，并且在垂直于第一方向的第二方向上延伸;第一插塞绝缘体，位于第一位线结构和第二位线结构之间，并且被配置为接触沿着存储接触插塞的第二方向延伸的侧表面 以及位于第一位线结构和第一插塞绝缘体之间的插头隔离图案。