公开(公告)号：US20220350256A1

公开(公告)日：2022-11-03

申请号：US17672937

申请日：2022-02-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Byunghoon LEE ,  Maenghyo CHO ,  Changyoung JEONG ,  Muyoung KIM ,  Junghwan MOON ,  Sungwoo PARK ,  Hyungwoo LEE

IPC: G03F7/20 ,  G03F7/40 ,  H01L21/027 ,  G05B19/4099 ,  G06F30/25

Abstract: A lithography method using a multiscale simulation includes estimating a shape of a virtual resist pattern for a selected resist based on a multiscale simulation; forming a test resist pattern by performing an exposure process on a layer formed of the selected resist; determining whether an error range between the test resist pattern and the virtual resist pattern is in an allowable range; and forming a resist pattern on a patterning object using the selected resist when the error range is in the allowable range. The multiscale simulation may use molecular scale simulation, quantum scale simulation, and a continuum scale simulation, and may model a unit lattice cell of the resist by mixing polymer chains, a photo-acid generator (PAG), and a quencher.