公开(公告)号：US20200159444A1

公开(公告)日：2020-05-21

申请号：US16428334

申请日：2019-05-31

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Myung Hyun JO

IPC: G06F3/06

Abstract: A storage device includes a memory and a controller. The controller controls the memory such that, in response to a request for a first read operation on the memory while a first write operation is performed on the memory, the first write operation is suspended, and the first read operation is performed, the suspended first write operation is resumed after the first read operation is completed, and second write operation subsequent to the first write operation is performed on the memory after the resumed first write operation is completed. The controller throttles an amount of data communicated to the memory device for the second write operation or for a second read operation subsequent to the first read operation, based on a frequency that the first write operation is suspended.

公开(公告)号：US20210255971A1

公开(公告)日：2021-08-19

申请号：US17124899

申请日：2020-12-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Youngwook KIM ,  Jinwoo KIM ,  Myung Hyun JO

IPC: G06F13/16 ,  G06F3/06 ,  G06F13/42

Abstract: An operation method of a storage device configured to implement physical functions respectively corresponding to hosts includes receiving performance information from each of the host devices, setting a performance level of each of the physical functions to a first level, processing a command from a first host through a corresponding first physical function, changing a performance level of the first physical function to a second level based on the performance information and a performance serviced to the first host, and processing a second command from a second host through at least one second physical function corresponding to the second host prior to processing a subsequent first command from the first host, through the first physical function, based on a performance level of the at least one second physical function being the first level and the performance level of the first physical function being the second level.

公开(公告)号：US20150134891A1

公开(公告)日：2015-05-14

申请号：US14459652

申请日：2014-08-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Myung Hyun JO

IPC: G06F13/28 ,  G06F12/02

CPC classification number: G06F13/28 ,  G06F12/0246 ,  G06F13/1673 ,  G06F2212/7203

Abstract: A nonvolatile memory system includes a nonvolatile memory; a buffer memory having first and second buffers; and a memory controller configured to manage the first and second buffers based on first and second indexes and to control the nonvolatile memory in response to a write request provided from an external device. The memory controller allocates a part of the first buffer to a Direct Memory Access (hereinafter, referred to as DMA) buffer in response to the write request, stores write data received from the external device in the allocated DMA buffer based on a DMA operation, partially swaps the first and second indexes to shift the write data stored in the allocated DMA buffer to the second buffer, and transmits the write data shifted to the second buffer to the nonvolatile memory.

Abstract translation: 非易失性存储器系统包括非易失性存储器; 具有第一和第二缓冲器的缓冲存储器; 以及存储器控制器，被配置为基于第一和第二索引来管理第一和第二缓冲器，并且响应于从外部设备提供的写入请求来控制非易失性存储器。 存储器控制器响应于写请求，将第一缓冲器的一部分分配给直接存储器访问（以下称为DMA）缓冲器，基于DMA操作将从外部设备接收的写数据存储在所分配的DMA缓冲器中， 部分地交换第一和第二索引以将存储在所分配的DMA缓冲器中的写入数据移位到第二缓冲器，并将移位到第二缓冲器的写入数据发送到非易失性存储器。

公开(公告)号：US20230004321A1

公开(公告)日：2023-01-05

申请号：US17941315

申请日：2022-09-09

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Myung Hyun JO

IPC: G06F3/06

Abstract: A storage device includes a memory and a controller. The controller controls the memory such that, in response to a request for a first read operation on the memory while a first write operation is performed on the memory, the first write operation is suspended, and the first read operation is performed, the suspended first write operation is resumed after the first read operation is completed, and second write operation subsequent to the first write operation is performed on the memory after the resumed first write operation is completed. The controller throttles an amount of data communicated to the memory device for the second write operation or for a second read operation subsequent to the first read operation, based on a frequency that the first write operation is suspended.

公开(公告)号：US20210157511A1

公开(公告)日：2021-05-27

申请号：US17164174

申请日：2021-02-01

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Myung Hyun JO

IPC: G06F3/06

Abstract: A storage device includes a memory and a controller. The controller controls the memory such that, in response to a request for a first read operation on the memory while a first write operation is performed on the memory, the first write operation is suspended, and the first read operation is performed, the suspended first write operation is resumed after the first read operation is completed, and second write operation subsequent to the first write operation is performed on the memory after the resumed first write operation is completed. The controller throttles an amount of data communicated to the memory device for the second write operation or for a second read operation subsequent to the first read operation, based on a frequency that the first write operation is suspended.