公开(公告)号：US20240311180A1

公开(公告)日：2024-09-19

申请号：US18509027

申请日：2023-11-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Robert Wisniewski ,  Rolf Riesen

IPC: G06F9/48

CPC classification number: G06F9/4856

Abstract: A method of migrating threads across a first node running a first operating system and a second node running a second operating system that is a different instance than the first operating system. The method includes a task of receiving, by a thread daemon of the first node, a request from a process on the first node to migrate a thread of the process to the second node. The method also includes a task of sending, by the thread daemon of the first node, the request to a thread daemon of the second node, a task of creating, by the thread daemon of the second node, a thread entry in a thread proxy of the second node and a proxy process on the second node, and a task of instantiating the thread within the proxy process.

公开(公告)号：US20240330201A1

公开(公告)日：2024-10-03

申请号：US18534532

申请日：2023-12-08

Applicant: Samsung Electronics Co., Ltd.

Inventor： Alan Gara ,  Robert Wisniewski ,  Douglas Joseph ,  Samantika Sury ,  Jai Dayal ,  Rolf Riesen

IPC: G06F12/1027

CPC classification number: G06F12/1027

Abstract: A system and method for address translation in a multi-node computing system. In some embodiments, the system includes a first node. The first node may include: a core; and a global address translation circuit, the core including: a core processing circuit; and a memory management unit configured to map local virtual addresses to global virtual addresses, the global address translation circuit being configured to map global virtual addresses to global physical addresses.

公开(公告)号：US20240311289A1

公开(公告)日：2024-09-19

申请号：US18593435

申请日：2024-03-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： David Lombard ,  Robert Wisniewski ,  Douglas Joseph ,  Matthew Wolf ,  Jai Dayal ,  James Loo ,  Andrew Thomas Tauferner ,  Rolf Riesen

IPC: G06F12/02 ,  G06F12/1027

CPC classification number: G06F12/023 ,  G06F12/1027

Abstract: A method to address memory in nodes of a distributed memory system includes partitioning the memory in each node into one or more memory blocks available for a global memory pool. The method also includes combining, in response to a request to address memory in the global memory pool, a global bit from a global page table with a physical address to generate a global virtual address. The global bit indicates whether the memory is local or remote. The method also includes translating, using global access tuple (GAT) tables, the global virtual address to a global physical address, and addressing a memory block in the global memory pool based on the global physical address.