公开(公告)号：US20210104508A1

公开(公告)日：2021-04-08

申请号：US16946620

申请日：2020-06-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： SUNGOK LEE ,  SANGDO PARK ,  JUN SEOMUN ,  BONGHYUN LEE

IPC: H01L27/02

Abstract: Semiconductor devices may include standard cells arranged in a first direction and a second direction intersecting the first direction. Both the first and second directions may be parallel to an upper surface of the substrate. Each of the standard cells may include semiconductor elements. The semiconductor device may also include filler cells between two standard cells, and each of the filler cells may include a filler active region and a filler contact connected to the filler active region and may extend in the first direction. The semiconductor device may further include a lower wiring pattern electrically connected to at least one of the semiconductor elements and may extend into at least one of the filler cells in the second direction, and the filler contacts may include wiring filler contacts lower than the lower wiring pattern and connected to at least one of the lower wiring pattern.

公开(公告)号：US20230246017A1

公开(公告)日：2023-08-03

申请号：US18192712

申请日：2023-03-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： SUNGOK LEE ,  SANGDO PARK ,  JUN SEOMUN ,  BONGHYUN LEE

IPC: H01L27/02

CPC classification number: H01L27/0207

Abstract: Semiconductor devices may include standard cells arranged in a first direction and a second direction intersecting the first direction. Both the first and second directions may be parallel to an upper surface of the substrate. Each of the standard cells may include semiconductor elements. The semiconductor device may also include filler cells between two standard cells, and each of the filler cells may include a filler active region and a filler contact connected to the filler active region and may extend in the first direction. The semiconductor device may further include a lower wiring pattern electrically connected to at least one of the semiconductor elements and may extend into at least one of the filler cells in the second direction, and the filler contacts may include wiring filler contacts lower than the lower wiring pattern and connected to at least one of the lower wiring pattern.

公开(公告)号：US20210134785A1

公开(公告)日：2021-05-06

申请号：US17028855

申请日：2020-09-22

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： JAEWAN YANG ,  WOOTAE KIM ,  HYUNGOCK KIM ,  SANGDO PARK ,  JUN SEOMUN

IPC: H01L27/02 ,  H01L23/522 ,  H01L27/088 ,  H01L21/768

Abstract: Disclosed are a semiconductor device and a method of fabricating the same. The method includes placing a standard cell, resizing a power via pattern in such a way that the power via pattern has a different width from a width of other via pattern, and applying different design rules to the power via pattern and the other via pattern, respectively, to perform a routing operation on the standard cell.