Nonvolatile memory devices with aligned trench isolation regions
    2.
    发明授权
    Nonvolatile memory devices with aligned trench isolation regions 有权
    具有对准沟槽隔离区域的非易失性存储器件

    公开(公告)号:US09190464B2

    公开(公告)日:2015-11-17

    申请号:US14136273

    申请日:2013-12-20

    CPC classification number: H01L29/045 H01L27/1157 H01L29/7881 H01L29/792

    Abstract: A nonvolatile memory device includes a substrate, an elongate isolation region including a field insulation film disposed in a trench in the substrate, and a word line crossing the insulation region and including a tunneling insulation layer on an active region of the substrate adjacent the isolation region, a charge storage layer on the tunneling insulation layer and a blocking insulation layer on the charge storage layer. A first plane index of a bottom surface of the trench has a first interface trap density and a second plane index of a sidewall of the trench has a second interface trap density equal to or less than the first interface trap density. In some embodiments, the first plane index may be (100) and the second plane index may be (100) or (310).

    Abstract translation: 非易失性存储器件包括衬底,包括设置在衬底中的沟槽中的场绝缘膜的细长隔离区域和与绝缘区域交叉的字线,并且在邻近隔离区域的衬底的有源区域上包括隧道绝缘层 ,隧道绝缘层上的电荷存储层和电荷存储层上的阻挡绝缘层。 沟槽的底表面的第一平面折射率具有第一界面陷阱密度,并且沟槽的侧壁的第二平面折射率具有等于或小于第一界面陷阱密度的第二界面陷阱密度。 在一些实施例中,第一平面索引可以是(100),第二平面索引可以是(100)或(310)。

    NONVOLATILE MEMORY DEVICES WITH ALIGNED TRENCH ISOLATION REGIONS
    9.
    发明申请
    NONVOLATILE MEMORY DEVICES WITH ALIGNED TRENCH ISOLATION REGIONS 有权
    具有对准的TRENCH隔离区域的非易失性存储器件

    公开(公告)号:US20140197465A1

    公开(公告)日:2014-07-17

    申请号:US14136273

    申请日:2013-12-20

    CPC classification number: H01L29/045 H01L27/1157 H01L29/7881 H01L29/792

    Abstract: A nonvolatile memory device includes a substrate, an elongate isolation region including a field insulation film disposed in a trench in the substrate, and a word line crossing the insulation region and including a tunneling insulation layer on an active region of the substrate adjacent the isolation region, a charge storage layer on the tunneling insulation layer and a blocking insulation layer on the charge storage layer. A first plane index of a bottom surface of the trench has a first interface trap density and a second plane index of a sidewall of the trench has a second interface trap density equal to or less than the first interface trap density. In some embodiments, the first plane index may be (100) and the second plane index may be (100) or (310).

    Abstract translation: 非易失性存储器件包括衬底,包括设置在衬底中的沟槽中的场绝缘膜的细长隔离区域和与绝缘区域交叉的字线,并且在邻近隔离区域的衬底的有源区域上包括隧道绝缘层 ,隧道绝缘层上的电荷存储层和电荷存储层上的阻挡绝缘层。 沟槽的底表面的第一平面折射率具有第一界面陷阱密度,并且沟槽的侧壁的第二平面折射率具有等于或小于第一界面陷阱密度的第二界面陷阱密度。 在一些实施例中,第一平面索引可以是(100),第二平面索引可以是(100)或(310)。

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