公开(公告)号：US20210027823A1

公开(公告)日：2021-01-28

申请号：US16848140

申请日：2020-04-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Chan Kyung KIM ,  Ji Yean KIM ,  Hyun Taek JUNG ,  Ji Eun KIM ,  Tae Seong KIM ,  Sang-Hoon JUNG ,  Jae Wook JOO

IPC: G11C11/16

Abstract: Magnetic junction memory devices and methods for writing data to memory devices are provided. The magnetic junction memory device includes a first memory bank including first magnetic junction memory cells, a first local write driver adjacent to the first memory bank, connected to global data lines, the first local write driver configured to write data to the first magnetic junction memory cells via local data lines, a second memory bank adjacent to the first memory bank and including second magnetic junction memory cells, a second local write driver adjacent to the second memory bank, connected to the global data lines, the second local write driver configured to write data to the second magnetic junction memory cells via local data lines, and a global write driver configured to provide first and second write data to the first and second local write driver, respectively, via the global data lines.

公开(公告)号：US20200335145A1

公开(公告)日：2020-10-22

申请号：US16691127

申请日：2019-11-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sang-Hoon JUNG

IPC: G11C7/22 ,  G11C7/10 ,  G11C11/409 ,  G11C11/408

Abstract: A memory device includes a cell array including cells, an address transition detector outputting a transition detection signal as to whether an address of a write command is changed, and a control logic circuit generating one of word-line-on signals for performing a write operation on the cell array in response to the write command, and terminating the write operation in accordance with the transition detection signal. The word-line-on signals include a long-kept word-line-on signal that stays active before the address is changed and a divided word-line-on signal that is, before the address is changed, divided into sub-word-line-on signals.

公开(公告)号：US20220406368A1

公开(公告)日：2022-12-22

申请号：US17682257

申请日：2022-02-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sang-Hoon JUNG ,  Seong-Jin CHO

IPC: G11C11/406 ,  G11C11/4072 ,  G11C11/408

Abstract: A memory device is provided. The memory device includes a plurality of memory chips that are stacked, wherein each of the memory chips includes a memory cell array, which includes a plurality of memory cell rows, a chip identifier generator configured to generate a chip identifier signal indicating a chip identifier of each of the memory chips, a refresh counter configured to generate a target row address for refreshing the memory cell rows in response to a refresh command, and a target row address generator, which receives the chip identifier signal and the target row address and outputs one of the target row address and an inverted target row address, obtained by inverting the target row address, as a refresh row address based on the chip identifier signal, and performs a refresh operation on a memory cell row corresponding to the refresh row address.

公开(公告)号：US20220375505A1

公开(公告)日：2022-11-24

申请号：US17882790

申请日：2022-08-08

Applicant: Samsung Electronics Co., Ltd.

Inventor： Chan Kyung KIM ,  Ji Yean KIM ,  Hyun Taek JUNG ,  Ji Eun KIM ,  Tae Seong KIM ,  Sang-Hoon JUNG ,  Jae Wook JOO

IPC: G11C11/16

Abstract: Magnetic junction memory devices and methods for writing data to memory devices are provided. The magnetic junction memory device includes a first memory bank including first magnetic junction memory cells, a first local write driver adjacent to the first memory bank, connected to global data lines, the first local write driver configured to write data to the first magnetic junction memory cells via local data lines, a second memory bank adjacent to the first memory bank and including second magnetic junction memory cells, a second local write driver adjacent to the second memory bank, connected to the global data lines, the second local write driver configured to write data to the second magnetic junction memory cells via local data lines, and a global write driver configured to provide first and second write data to the first and second local write driver, respectively, via the global data lines.

公开(公告)号：US20220122649A1

公开(公告)日：2022-04-21

申请号：US17563619

申请日：2021-12-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sang-Hoon JUNG

IPC: G11C11/408 ,  G11C11/409

Abstract: A memory device includes a cell array including cells, an address transition detector outputting a transition detection signal as to whether an address of a write command is changed, and a control logic circuit generating one of word-line-on signals for performing a write operation on the cell array in response to the write command, and terminating the write operation in accordance with the transition detection signal. The word-line-on signals include a long-kept word-line-on signal that stays active before the address is changed and a divided word-line-on signal that is, before the address is changed, divided into sub-word-line-on signals.

公开(公告)号：US20200234749A1

公开(公告)日：2020-07-23

申请号：US16547027

申请日：2019-08-21

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sang-Hoon JUNG

IPC: G11C11/16 ,  H01L27/22

Abstract: A memory device includes a first memory cell that is connected with a first source line, a first word line, and a first bit line, a first write circuit to receive first write data that are stored in the first memory cell through a first write input/output line and to control a voltage of the first source line and a voltage of the first bit line based on the first write data, and a first pull-down circuit to receive first pull-down data corresponding to the first write data from the first write circuit through a first internal metal line and to pulls down the voltage of at least one of the first source line and the first bit line to a predetermined voltage based on the first pull-down data.