公开(公告)号：US20250118672A1

公开(公告)日：2025-04-10

申请号：US18759447

申请日：2024-06-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sang Sub Song ,  Eunkyeong Park ,  Seokbeom Yong

IPC: H01L23/528 ,  H01L23/00 ,  H01L23/14 ,  H01L23/498 ,  H01L23/522 ,  H01L25/18 ,  H10B80/00

Abstract: A semiconductor packaging structure is provided including first through third routing layers. Each of the first through third routing layers includes a first through a third plurality of signal wires and a first through a third plurality of ground wires arranged alternately in a first horizontal direction. A plurality of vias connect the first to third ground wires to each other. The first to third signal wires and the first to third ground wires extend in a second horizontal direction intersecting the first horizontal direction. Each signal wire among the first to third signal wires is separated from any other signal wires. The first to third pluralities of signal wires overlap each other, and the first to third pluralities of ground wires overlap each other.

公开(公告)号：US20250132277A1

公开(公告)日：2025-04-24

申请号：US18801963

申请日：2024-08-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seokbeom Yong ,  Jaesun Kim

IPC: H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01L23/538 ,  H01L25/10

Abstract: A semiconductor package includes a lower redistribution structure, a lower semiconductor chip on the lower redistribution structure, and an upper redistribution structure t on the lower semiconductor chip and including a signal pad, a power pad, a grounding plane, and an upper insulation layer, where the signal pad, the power pad, and the grounding plane are in the upper insulation layer, where a distance between the signal pad and the lower redistribution structure in a vertical direction is less than a distance between the power pad and the lower redistribution structure in the vertical direction, and where the vertical direction is perpendicular to an upper surface of the lower redistribution structure.