公开(公告)号：US20240232066A1

公开(公告)日：2024-07-11

申请号：US18454293

申请日：2023-08-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sang-Won PARK ,  Jooyong PARK ,  Seokmin YOON ,  Bongsoon LIM

IPC: G06F12/02 ,  G06F13/16

CPC classification number: G06F12/023 ,  G06F13/1668

Abstract: Disclosed is a memory system including a memory device and a memory controller. The memory device includes a package of a first memory chip configured to receive input/output signals through first input/output pads and a second memory chip having second input/output pads connected to the first input/output pads by a mapping connection. The memory controller configured to provide the input/output signals to the memory device. The second memory chip is configured to receive input/output signals different from the input/output signals provided by the memory controller to the first memory chip due to the mapping connection. The first and second memory chips are configured to selectively ignore the input/output signals provided by the memory controller based on the mapping connection.